rtwn_write_1
rtwn_write_1(sc, R92C_DUAL_TSF_RST, R92C_DUAL_TSF_RESET(uvp->id));
rtwn_write_1(sc, R92C_TXPAUSE, 0);
rtwn_write_1(sc, R92C_DUAL_TSF_RST,
rtwn_write_1(sc, R92C_TXPAUSE, 0);
rtwn_write_1(sc, R92C_SIFS_CCK + 1, 10);
rtwn_write_1(sc, R92C_SIFS_OFDM + 1, 10);
rtwn_write_1(sc, R92C_SPEC_SIFS + 1, 10);
rtwn_write_1(sc, R92C_MAC_SPEC_SIFS + 1, 10);
rtwn_write_1(sc, R92C_R2T_SIFS + 1, 10);
rtwn_write_1(sc, R92C_T2T_SIFS + 1, 10);
RTWN_CHK(rtwn_write_1(sc, R92C_RQPN_NPQ, sc->nnqpages));
RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_BCNQ_BDNY, tx_boundary));
RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_MGQ_BDNY, tx_boundary));
RTWN_CHK(rtwn_write_1(sc, R92C_TXPKTBUF_WMAC_LBK_BF_HD, tx_boundary));
RTWN_CHK(rtwn_write_1(sc, R92C_TRXFF_BNDY, tx_boundary));
RTWN_CHK(rtwn_write_1(sc, R92C_TDECTRL + 1, tx_boundary));
error = rtwn_write_1(sc, sc->mac_prog[i].reg,
rtwn_write_1(sc, R92C_DARFRC + i, i + 1);
rtwn_write_1(sc, R92C_RARFRC + i, i + 1);
rtwn_write_1(sc, R92C_SLOT, slottime);
rtwn_write_1(sc, wme2reg[ac], aifs);
rtwn_write_1(sc, R92C_BCN_CTRL(0), R92C_BCN_CTRL_DIS_TSF_UDT0);
rtwn_write_1(sc, R92C_BCN_CTRL(1), R92C_BCN_CTRL_DIS_TSF_UDT0);
rtwn_write_1(sc, R92C_DRVERLYINT, 0x05);
rtwn_write_1(sc, R92C_BCNDMATIM, 0x02);
rtwn_write_1(sc, R92C_RX_DRVINFO_SZ, R92C_RX_DRVINFO_SZ_DEF);
rtwn_write_1(sc, R92C_ACKTO, sc->ackto);
rtwn_write_1(sc, R92C_HWSEQ_CTRL, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_NAV_UPPER, 0);
rtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_OFF);
error = rtwn_write_1(sc, R92C_EFUSE_ACCESS, R92C_EFUSE_ACCESS_ON);
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_INIRTS_RATE_SEL, ridx);
return (rtwn_write_1(sc, addr,
rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0xFF);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_CR,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_RF_CTRL, 0);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
rtwn_write_1(sc, R92C_GPIO_OUT, rtwn_read_1(sc, R92C_GPIO_IN));
rtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff);
rtwn_write_1(sc, R92C_GPIO_IO_SEL,
rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 1, 0);
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R92C_SYS_FUNC_EN, R92C_SYS_FUNC_EN_PPLL |
rtwn_write_1(sc, R92C_RSV_CTRL, 0);
rtwn_write_1(sc, R92C_TXPAUSE,
rtwn_write_1(sc, R92C_BCN_CTRL(0),
rtwn_write_1(sc, R92C_BCN_CTRL(1),
rtwn_write_1(sc, R92C_GPIO_MUXCFG,
rtwn_write_1(sc, R92C_TXPAUSE, vals->txpause);
rtwn_write_1(sc, R92C_BCN_CTRL(0), vals->bcn_ctrl[0]);
rtwn_write_1(sc, R92C_BCN_CTRL(1), vals->bcn_ctrl[1]);
rtwn_write_1(sc, R92C_MCUFWDL + 1, 0);
rtwn_write_1(sc, R92C_CR, 0);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_CR,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_RF_CTRL, 0);
rtwn_write_1(sc, R92C_APS_FSMCO + 3, 0);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg & ~0x08);
rtwn_write_1(sc, R92C_RSV_CTRL + 1, reg | 0x08);
rtwn_write_1(sc, R92C_GPIO_OUT, rtwn_read_1(sc, R92C_GPIO_IN));
rtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff);
rtwn_write_1(sc, R92C_GPIO_IO_SEL,
rtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48);
rtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH + 1, 4);
rtwn_write_1(sc, R88E_TX_RPT_MACID_MAX,
rtwn_write_1(sc, R92C_USB_HRPWM, 0);
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_write_1(sc, R92C_TXPAUSE,
rtwn_write_1(sc, R92C_BCN_CTRL(0),
rtwn_write_1(sc, R92C_BCN_CTRL(1),
rtwn_write_1(sc, R92C_GPIO_MUXCFG,
rtwn_write_1(sc, R92C_TXPAUSE, vals->txpause);
rtwn_write_1(sc, R92C_BCN_CTRL(0), vals->bcn_ctrl[0]);
rtwn_write_1(sc, R92C_BCN_CTRL(1), vals->bcn_ctrl[1]);
rtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80);
rtwn_write_1(sc, R92C_RSV_CTRL, 0);
rtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b);
rtwn_write_1(sc, R92C_AFE_XTAL_CTRL, 0x0f);
rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x77);
rtwn_write_1(sc, R92C_PCIE_CTRL_REG + 3, 0x22);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_RF_CTRL, 0);
rtwn_write_1(sc, R92C_SPS0_CTRL, 0x23); /* ditto */
rtwn_write_1(sc, R92C_AFE_XTAL_CTRL, 0x0e); /* different with btcoex */
rtwn_write_1(sc, R92C_RSV_CTRL, 0x0e);
rtwn_write_1(sc, R92C_APS_FSMCO, R92C_APS_FSMCO_PDN_EN);
rtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16);
rtwn_write_1(sc, R92C_BCN_MAX_ERR, 0xff);
rtwn_write_1(sc, 0x15, 0xe9);
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_write_1(sc, R92C_TXPAUSE,
rtwn_write_1(sc, R92C_BCN_CTRL(0),
rtwn_write_1(sc, R92C_BCN_CTRL(1),
rtwn_write_1(sc, R92C_GPIO_MUXCFG,
rtwn_write_1(sc, R92C_TXPAUSE, vals->txpause);
rtwn_write_1(sc, R92C_BCN_CTRL(0), vals->bcn_ctrl[0]);
rtwn_write_1(sc, R92C_BCN_CTRL(1), vals->bcn_ctrl[1]);
rtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode & ~0x70);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_OFDM1_LSTF + 3, txmode);
rtwn_write_1(sc, R92C_TXPAUSE, 0x00);
rtwn_write_1(sc, R92C_HMETFR + 3, 0x20);
rtwn_write_1(sc, R92C_MCUFWDL + 1, 0);
rtwn_write_1(sc, R92C_INIDATA_RATE_SEL(macid), maxrate);
rtwn_write_1(sc, R92C_C2H_EVT_CLEAR, R92C_C2H_EVT_HOST_CLOSE);
return (rtwn_write_1(sc, R92C_PBP, SM(R92C_PBP_PSRX, R92C_PBP_128) |
rtwn_write_1(sc, R92C_AGGR_BREAK_TIME, 0x16);
RTWN_CHK(rtwn_write_1(sc, R92C_RSV_CTRL, 0));
RTWN_CHK(rtwn_write_1(sc, R92C_SPS0_CTRL, 0x2b));
RTWN_CHK(rtwn_write_1(sc, R92C_LDOV12D_CTRL,
RTWN_CHK(rtwn_write_1(sc, 0xfe10, 0x19));
error = rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_APSD_CTRL, R92C_APSD_CTRL_OFF);
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_SYS_FUNC_EN + 1,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_AFE_PLL_CTRL, 0x80);
rtwn_write_1(sc, R92C_SYS_ISO_CTRL,
rtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x00);
rtwn_write_1(sc, R92C_SYS_ISO_CTRL + 1,
rtwn_write_1(sc, R92C_LDOA15_CTRL, R92C_LDOA15_CTRL_OBUF);
rtwn_write_1(sc, R92C_SPS0_CTRL, 0x23);
rtwn_write_1(sc, R92C_RSV_CTRL, 0x0E);
rtwn_write_1(sc, R92C_RXDMA_AGG_PG_TH, 48);
rtwn_write_1(sc, R92C_USB_DMA_AGG_TO, 4);
rtwn_write_1(sc, R92C_USB_AGG_TH, 8);
rtwn_write_1(sc, R92C_USB_AGG_TO, 6);
rtwn_write_1(sc, 0xfe40, 0xe0);
rtwn_write_1(sc, 0xfe41, 0x8d);
rtwn_write_1(sc, 0xfe42, 0x80);
rtwn_write_1(sc, 0x15, 0xe9);
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R92C_SYS_FUNC_EN,
rtwn_write_1(sc, R92C_LDOHCI12_CTRL, 0x0f);
rtwn_write_1(sc, 0x15, 0xe9);
rtwn_write_1(sc, R92C_AFE_XTAL_CTRL + 1, 0x80);
rtwn_write_1(sc, R92C_LEDCFG0, reg);
rtwn_write_1(sc, R12A_DATA_SEC,
rtwn_write_1(sc, R12A_DATA_SEC, R12A_DATA_SEC_NO_EXT);
rtwn_write_1(sc, R92C_RF_CTRL,
RTWN_CHK(rtwn_write_1(sc, R92C_LDO_SWR_CTRL, 0xc3));
RTWN_CHK(rtwn_write_1(sc, R92C_LDO_SWR_CTRL, 0x83));
error = rtwn_write_1(sc, R92C_CR, 0);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_CR,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_RF_CTRL, 0);
rtwn_write_1(sc, R92C_ACLK_MON, 0);
rtwn_write_1(sc, R92C_USB_HRPWM, 0);
rtwn_write_1(sc, R92C_TXPAUSE, 0);
rtwn_write_1(sc, R92C_TXPAUSE,
rtwn_write_1(sc, R12A_OFDMCCK_EN, 0);
rtwn_write_1(sc, R12A_CCK_RX_PATH + 3, 0x0f);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R12A_DATA_SEC, txsc);
rtwn_write_1(sc, R12A_DATA_SEC, ext_chan);
rtwn_write_1(sc, R12A_DATA_SEC, R12A_DATA_SEC_NO_EXT);
rtwn_write_1(sc, R12A_RFE_PINMUX(0) + 2, 0x77);
rtwn_write_1(sc, R12A_CCK_CHECK, 0);
rtwn_write_1(sc, R12A_CCK_CHECK, R12A_CCK_CHECK_5GHZ);
rtwn_write_1(sc, R12A_RFE_PINMUX(0) + 2, 0x33);
rtwn_write_1(sc, R92C_USTIME_TSF, 0x50);
rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50);
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R12A_RF_B_CTRL,
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R92C_RF_CTRL,
rtwn_write_1(sc, R12A_RF_B_CTRL,
rtwn_write_1(sc, R12A_RF_B_CTRL,
RTWN_CHK(rtwn_write_1(sc, R92C_GPIO_IOSEL, 0));
RTWN_CHK(rtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0));
error = rtwn_write_1(sc, R92C_CR, 0);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R12A_HSSI_PARAM1(0), 0x04);
rtwn_write_1(sc, R12A_HSSI_PARAM1(1), 0x04);
rtwn_write_1(sc, R92C_CR,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R12A_HSSI_PARAM1(0), 0x04);
rtwn_write_1(sc, R12A_HSSI_PARAM1(1), 0x04);
rtwn_write_1(sc, R92C_MCUFWDL,
rtwn_write_1(sc, R92C_MAC_PINMUX_CFG, 0x07);
rtwn_write_1(sc, R92C_GPIO_OUT, 0);
rtwn_write_1(sc, R92C_GPIO_IOSEL, 0xff);
rtwn_write_1(sc, R92C_GPIO_MOD, 0);
rtwn_write_1(sc, R92C_LEDCFG2, 0x82);
rtwn_write_1(sc, 0xf050, 0x01);
rtwn_write_1(sc, R92C_RXDMA_STATUS + 1, 0xf5);
rtwn_write_1(sc, R12A_AMPDU_MAX_TIME, rs->ampdu_max_time);
rtwn_write_1(sc, R92C_USTIME_TSF, 0x50);
rtwn_write_1(sc, R92C_USTIME_EDCA, 0x50);
rtwn_write_1(sc, R92C_RX_PKT_LIMIT, 0x18);
rtwn_write_1(sc, R92C_PIFS, 0);
rtwn_write_1(sc, R12A_EARLY_MODE_CONTROL + 3, 0x01);
rtwn_write_1(sc, R12A_SDIO_CTRL, 0);
rtwn_write_1(sc, R92C_ACLK_MON, 0);
rtwn_write_1(sc, R92C_USB_HRPWM, 0);
rtwn_write_1(sc, R12A_CCK_CHECK, 0);
rtwn_write_1(sc, R12A_CCK_CHECK, R12A_CCK_CHECK_5GHZ);
error = rtwn_write_1(sc, R92C_CR, 0);
rtwn_write_1(sc, R92C_TXPAUSE, R92C_TX_QUEUE_ALL);
rtwn_write_1(sc, R92C_CR,
rtwn_write_1(sc, R92C_MCUFWDL, 0);
rtwn_write_1(sc, R92C_RF_CTRL, 0);
RTWN_CHK(rtwn_write_1(sc, R88E_TXPKTBUF_BCNQ1_BDNY,
RTWN_CHK(rtwn_write_1(sc, R21A_DWBCN1_CTRL + 1,
rtwn_write_1(sc, R92C_FWHW_TXQ_CTRL,
rtwn_write_1(sc, R92C_LEDCFG2,
rtwn_write_1(sc, R21A_DWBCN1_CTRL, uc->tx_agg_desc_num << 1);