headers/private/kernel/arch/debug.h

45

void arch_debug_save_registers(struct arch_debug_registers* registers);

src/add-ons/accelerants/intel_extreme/accelerant.cpp

118

(void**)&gInfo->registers, B_ANY_ADDRESS, B_READ_AREA | B_WRITE_AREA,

src/add-ons/accelerants/intel_extreme/accelerant.h

39

uint8* registers;

src/add-ons/accelerants/intel_extreme/accelerant.h

87

return *(volatile uint32*)(gInfo->registers

src/add-ons/accelerants/intel_extreme/accelerant.h

95

*(volatile uint32*)(gInfo->registers

src/add-ons/accelerants/intel_extreme/engine.cpp

101

uint32 registers;

src/add-ons/accelerants/intel_extreme/engine.cpp

104

registers = gInfo->shared_info->physical_overlay_registers;

src/add-ons/accelerants/intel_extreme/engine.cpp

106

registers = gInfo->shared_info->overlay_offset;

src/add-ons/accelerants/intel_extreme/engine.cpp

108

Write(registers | (updateCoefficients ? OVERLAY_UPDATE_COEFFICIENTS : 0));

src/add-ons/accelerants/intel_extreme/overlay.cpp

195

overlay_registers* registers = gInfo->overlay_registers;

src/add-ons/accelerants/intel_extreme/overlay.cpp

197

registers->color_key_red = red;

src/add-ons/accelerants/intel_extreme/overlay.cpp

198

registers->color_key_green = green;

src/add-ons/accelerants/intel_extreme/overlay.cpp

199

registers->color_key_blue = blue;

src/add-ons/accelerants/intel_extreme/overlay.cpp

200

registers->color_key_mask_red = ~redMask;

src/add-ons/accelerants/intel_extreme/overlay.cpp

201

registers->color_key_mask_green = ~greenMask;

src/add-ons/accelerants/intel_extreme/overlay.cpp

202

registers->color_key_mask_blue = ~blueMask;

src/add-ons/accelerants/intel_extreme/overlay.cpp

203

registers->color_key_enabled = true;

src/add-ons/accelerants/intel_extreme/overlay.cpp

287

overlay_registers* registers = gInfo->overlay_registers;

src/add-ons/accelerants/intel_extreme/overlay.cpp

290

registers->overlay_enabled = false;

src/add-ons/accelerants/intel_extreme/overlay.cpp

555

overlay_registers* registers = gInfo->overlay_registers;

src/add-ons/accelerants/intel_extreme/overlay.cpp

562

registers->source_format = OVERLAY_FORMAT_RGB15;

src/add-ons/accelerants/intel_extreme/overlay.cpp

565

registers->source_format = OVERLAY_FORMAT_RGB16;

src/add-ons/accelerants/intel_extreme/overlay.cpp

568

registers->source_format = OVERLAY_FORMAT_RGB32;

src/add-ons/accelerants/intel_extreme/overlay.cpp

572

registers->source_format = OVERLAY_FORMAT_YCbCr422;

src/add-ons/accelerants/intel_extreme/overlay.cpp

603

registers->window_left = left;

src/add-ons/accelerants/intel_extreme/overlay.cpp

604

registers->window_top = top;

src/add-ons/accelerants/intel_extreme/overlay.cpp

605

registers->window_width = right - left;

src/add-ons/accelerants/intel_extreme/overlay.cpp

606

registers->window_height = bottom - top;

src/add-ons/accelerants/intel_extreme/overlay.cpp

632

registers->source_width_rgb = right - left;

src/add-ons/accelerants/intel_extreme/overlay.cpp

633

registers->source_height_rgb = bottom - top;

src/add-ons/accelerants/intel_extreme/overlay.cpp

635

registers->source_bytes_per_row_rgb = (((overlay->buffer_offset

src/add-ons/accelerants/intel_extreme/overlay.cpp

641

registers->source_bytes_per_row_rgb = (((((yaddress

src/add-ons/accelerants/intel_extreme/overlay.cpp

646

registers->scale_rgb.horizontal_downscale_factor

src/add-ons/accelerants/intel_extreme/overlay.cpp

648

registers->scale_rgb.horizontal_scale_fraction

src/add-ons/accelerants/intel_extreme/overlay.cpp

650

registers->scale_uv.horizontal_downscale_factor

src/add-ons/accelerants/intel_extreme/overlay.cpp

652

registers->scale_uv.horizontal_scale_fraction

src/add-ons/accelerants/intel_extreme/overlay.cpp

656

registers->scale_rgb.vertical_scale_fraction = verticalScale & 0xfff;

src/add-ons/accelerants/intel_extreme/overlay.cpp

657

registers->scale_uv.vertical_scale_fraction = verticalScaleUV & 0xfff;

src/add-ons/accelerants/intel_extreme/overlay.cpp

658

registers->vertical_scale_rgb = verticalScale >> 12;

src/add-ons/accelerants/intel_extreme/overlay.cpp

659

registers->vertical_scale_uv = verticalScaleUV >> 12;

src/add-ons/accelerants/intel_extreme/overlay.cpp

682

registers->horizontal_coefficients_rgb[pos]

src/add-ons/accelerants/intel_extreme/overlay.cpp

693

registers->horizontal_coefficients_uv[pos]

src/add-ons/accelerants/intel_extreme/overlay.cpp

709

registers->color_control_output_mode = true;

src/add-ons/accelerants/intel_extreme/overlay.cpp

710

registers->select_pipe = 0;

src/add-ons/accelerants/intel_extreme/overlay.cpp

714

registers->buffer_rgb0

src/add-ons/accelerants/intel_extreme/overlay.cpp

716

registers->stride_rgb = buffer->bytes_per_row;

src/add-ons/accelerants/intel_extreme/overlay.cpp

718

registers->mirroring_mode

src/add-ons/accelerants/intel_extreme/overlay.cpp

721

registers->ycbcr422_order = 0;

src/add-ons/kernel/busses/agp_gart/intel_gart.cpp

260

vuint32* registers;

src/add-ons/kernel/busses/agp_gart/intel_gart.cpp

696

B_ANY_KERNEL_ADDRESS, B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)&info.registers);

src/add-ons/kernel/busses/agp_gart/intel_gart.cpp

724

info.gtt_physical_base = read32(info.registers

src/add-ons/kernel/busses/agp_gart/intel_gart.cpp

831

write32(sInfo.registers + INTEL_PAGE_TABLE_CONTROL,

src/add-ons/kernel/busses/agp_gart/intel_gart.cpp

833

read32(sInfo.registers + INTEL_PAGE_TABLE_CONTROL);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

118

status = read32(bus->registers + PCH_IC_STATUS);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

132

write32(bus->registers + PCH_IC_CON,

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

133

read32(bus->registers + PCH_IC_CON) & ~PCH_IC_CON_10BIT_ADDR_MASTER);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

134

write32(bus->registers + PCH_IC_TAR, slaveAddress);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

136

write32(bus->registers + PCH_IC_INTR_MASK, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

137

read32(bus->registers + PCH_IC_CLR_INTR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

141

read32(bus->registers + PCH_IC_CLR_INTR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

142

write32(bus->registers + PCH_IC_INTR_MASK, PCH_IC_INTR_STAT_TX_EMPTY);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

150

- read32(bus->registers + PCH_IC_TXFLR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

163

write32(bus->registers + PCH_IC_DATA_CMD, cmd);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

170

- read32(bus->registers + PCH_IC_TXFLR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

185

write32(bus->registers + PCH_IC_DATA_CMD, cmd);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

194

write32(bus->registers + PCH_IC_INTR_MASK,

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

206

uint32 rxBytes = read32(bus->registers + PCH_IC_RXFLR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

214

uint32 read = read32(bus->registers + PCH_IC_DATA_CMD);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

227

- read32(bus->registers + PCH_IC_TXFLR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

235

write32(bus->registers + PCH_IC_INTR_MASK,

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

30

write32(bus->registers + PCH_IC_ENABLE, status);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

31

if ((read32(bus->registers + PCH_IC_ENABLE_STATUS) & 1) == status)

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

410

(void **)&bus->registers);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

413

uint32 version = read32(bus->registers + PCH_IC_COMP_VERSION);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

417

bus->capabilities = read32(bus->registers + PCH_SUP_CAPABLITIES);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

428

write32(bus->registers + PCH_SUP_RESETS, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

429

write32(bus->registers + PCH_SUP_RESETS, PCH_SUP_RESETS_FUNC | PCH_SUP_RESETS_IDMA);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

433

bus->ss_hcnt = read32(bus->registers + PCH_IC_SS_SCL_HCNT);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

435

bus->ss_lcnt = read32(bus->registers + PCH_IC_SS_SCL_LCNT);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

437

bus->fs_hcnt = read32(bus->registers + PCH_IC_FS_SCL_HCNT);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

439

bus->fs_lcnt = read32(bus->registers + PCH_IC_FS_SCL_LCNT);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

441

bus->sda_hold_time = read32(bus->registers + PCH_IC_SDA_HOLD);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

448

write32(bus->registers + PCH_IC_SS_SCL_HCNT, bus->ss_hcnt);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

449

write32(bus->registers + PCH_IC_SS_SCL_LCNT, bus->ss_lcnt);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

450

write32(bus->registers + PCH_IC_FS_SCL_HCNT, bus->fs_hcnt);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

451

write32(bus->registers + PCH_IC_FS_SCL_LCNT, bus->fs_lcnt);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

453

write32(bus->registers + PCH_IC_HS_SCL_HCNT, bus->hs_hcnt);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

455

write32(bus->registers + PCH_IC_HS_SCL_LCNT, bus->hs_lcnt);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

457

uint32 reg = read32(bus->registers + PCH_IC_COMP_VERSION);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

459

write32(bus->registers + PCH_IC_SDA_HOLD, bus->sda_hold_time);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

46

uint32 enable = read32(bus->registers + PCH_IC_ENABLE);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

465

uint32 reg = read32(bus->registers + PCH_IC_COMP_PARAM1);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

472

write32(bus->registers + PCH_IC_RX_TL, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

473

write32(bus->registers + PCH_IC_TX_TL, bus->tx_fifo_depth / 2);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

478

write32(bus->registers + PCH_IC_CON, bus->masterConfig);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

480

write32(bus->registers + PCH_IC_INTR_MASK, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

481

read32(bus->registers + PCH_IC_CLR_INTR);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

50

uint32 status = read32(bus->registers + PCH_IC_INTR_STAT);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

52

write32(bus->registers + PCH_IC_CLR_RX_UNDER, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

54

write32(bus->registers + PCH_IC_CLR_RX_OVER, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

56

write32(bus->registers + PCH_IC_CLR_TX_OVER, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

58

write32(bus->registers + PCH_IC_CLR_RD_REQ, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

60

write32(bus->registers + PCH_IC_CLR_TX_ABRT, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

62

write32(bus->registers + PCH_IC_CLR_RX_DONE, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

64

write32(bus->registers + PCH_IC_CLR_ACTIVITY, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

66

write32(bus->registers + PCH_IC_CLR_STOP_DET, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

68

write32(bus->registers + PCH_IC_CLR_START_DET, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.cpp

70

write32(bus->registers + PCH_IC_CLR_GEN_CALL, 0);

src/add-ons/kernel/busses/i2c/pch/pch_i2c.h

98

addr_t registers;

src/add-ons/kernel/busses/mmc/sdhci.cpp

52

SdhciBus::SdhciBus(struct registers* registers, uint8_t irq, bool poll)

src/add-ons/kernel/busses/mmc/sdhci.cpp

54

fRegisters(registers),

src/add-ons/kernel/busses/mmc/sdhci.h

22

SdhciBus(struct registers* registers, uint8_t irq, bool poll);

src/add-ons/kernel/busses/mmc/sdhci.h

44

struct registers* fRegisters;

src/add-ons/kernel/busses/mmc/sdhci_acpi.cpp

98

struct registers* _regs;

src/add-ons/kernel/busses/mmc/sdhci_pci.cpp

110

struct registers* _regs;

src/add-ons/kernel/busses/random/ccp/ccp.cpp

32

uint32 lowValue = read32(bus->registers + CCP_REG_TRNG);

src/add-ons/kernel/busses/random/ccp/ccp.cpp

33

uint32 highValue = read32(bus->registers + CCP_REG_TRNG);

src/add-ons/kernel/busses/random/ccp/ccp.cpp

84

(void **)&bus->registers);

src/add-ons/kernel/busses/random/ccp/ccp.h

52

addr_t registers;

src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp

677

addr_t registers[B_COUNT_OF(bars)] = {0};

src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp

694

(void**)&registers[index]);

src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp

697

bus->commonCfgAddr = registers[common.bar] + common.offset;

src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp

698

bus->isrAddr = registers[isr.bar] + isr.offset;

src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp

699

bus->notifyAddr = registers[notify.cap.bar] + notify.cap.offset;

src/add-ons/kernel/busses/virtio/virtio_pci/virtio_pci.cpp

702

bus->base_addr = registers[deviceCap.bar] + deviceCap.offset;

src/add-ons/kernel/drivers/graphics/intel_extreme/driver.cpp

438

gDeviceInfo[found]->registers = info->u.h0.base_registers[0];

src/add-ons/kernel/drivers/graphics/intel_extreme/driver.h

46

return *(volatile uint16*)(info.registers

src/add-ons/kernel/drivers/graphics/intel_extreme/driver.h

55

return *(volatile uint32*)(info.registers

src/add-ons/kernel/drivers/graphics/intel_extreme/driver.h

64

*(volatile uint16*)(info.registers

src/add-ons/kernel/drivers/graphics/intel_extreme/driver.h

73

*(volatile uint32*)(info.registers

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

47

overlay_registers registers;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

48

memset(&registers, 0, sizeof(registers));

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

49

registers.contrast_correction = 0x48;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

50

registers.saturation_cos_correction = 0x9a;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

53

user_memcpy(_registers, &registers, sizeof(overlay_registers));

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

656

(void**)&info.registers);

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme_private.h

28

addr_t registers;

src/add-ons/kernel/drivers/graphics/matrox/driver.c

323

int registers = 1;

src/add-ons/kernel/drivers/graphics/matrox/driver.c

331

registers = 0;

src/add-ons/kernel/drivers/graphics/matrox/driver.c

359

di->pcii.u.h0.base_registers[registers],

src/add-ons/kernel/drivers/graphics/matrox/driver.c

360

di->pcii.u.h0.base_register_sizes[registers],

src/add-ons/kernel/drivers/graphics/neomagic/driver.c

335

int registers = 1;

src/add-ons/kernel/drivers/graphics/neomagic/driver.c

379

di->pcii.u.h0.base_registers[registers],

src/add-ons/kernel/drivers/graphics/neomagic/driver.c

380

di->pcii.u.h0.base_register_sizes[registers],

src/add-ons/kernel/drivers/graphics/nvidia/driver.c

539

int registers = 0;

src/add-ons/kernel/drivers/graphics/nvidia/driver.c

568

if ((di->pcii.u.h0.base_register_flags[registers] & PCI_address_type)

src/add-ons/kernel/drivers/graphics/nvidia/driver.c

579

di->pcii.u.h0.base_registers_pci[registers],

src/add-ons/kernel/drivers/graphics/nvidia/driver.c

580

di->pcii.u.h0.base_register_sizes[registers],

src/add-ons/kernel/drivers/graphics/radeon_hd/device.cpp

84

uint32 oldValue = read32(info.registers + reg);

src/add-ons/kernel/drivers/graphics/radeon_hd/device.cpp

89

write32(info.registers + reg, value);

src/add-ons/kernel/drivers/graphics/radeon_hd/device.cpp

91

value = read32(info.registers + reg);

src/add-ons/kernel/drivers/graphics/radeon_hd/driver.cpp

782

gDeviceInfo[found]->registers = info->u.h0.base_registers[0];

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

330

uint32 bus_cntl = read32(info.registers + R600_BUS_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

331

uint32 d1vga_control = read32(info.registers + AVIVO_D1VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

332

uint32 d2vga_control = read32(info.registers + AVIVO_D2VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

334

= read32(info.registers + AVIVO_VGA_RENDER_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

335

uint32 rom_cntl = read32(info.registers + R600_ROM_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

338

write32(info.registers + R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

340

write32(info.registers + AVIVO_D1VGA_CONTROL, (d1vga_control

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

343

write32(info.registers + AVIVO_D2VGA_CONTROL, (d2vga_control

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

346

write32(info.registers + AVIVO_VGA_RENDER_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

349

write32(info.registers + R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

384

write32(info.registers + R600_BUS_CNTL, bus_cntl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

385

write32(info.registers + AVIVO_D1VGA_CONTROL, d1vga_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

386

write32(info.registers + AVIVO_D2VGA_CONTROL, d2vga_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

387

write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vga_render_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

388

write32(info.registers + R600_ROM_CNTL, rom_cntl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

398

uint32 viph_control = read32(info.registers + RADEON_VIPH_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

399

uint32 bus_cntl = read32(info.registers + R600_BUS_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

400

uint32 d1vga_control = read32(info.registers + AVIVO_D1VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

401

uint32 d2vga_control = read32(info.registers + AVIVO_D2VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

403

= read32(info.registers + AVIVO_VGA_RENDER_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

404

uint32 rom_cntl = read32(info.registers + R600_ROM_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

407

write32(info.registers + RADEON_VIPH_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

410

write32(info.registers + R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

412

write32(info.registers + AVIVO_D1VGA_CONTROL, (d1vga_control

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

415

write32(info.registers + AVIVO_D2VGA_CONTROL, (d2vga_control

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

418

write32(info.registers + AVIVO_VGA_RENDER_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

421

write32(info.registers + R600_ROM_CNTL, (rom_cntl | R600_SCK_OVERWRITE));

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

456

write32(info.registers + RADEON_VIPH_CONTROL, viph_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

457

write32(info.registers + R600_BUS_CNTL, bus_cntl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

458

write32(info.registers + AVIVO_D1VGA_CONTROL, d1vga_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

459

write32(info.registers + AVIVO_D2VGA_CONTROL, d2vga_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

460

write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vga_render_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

461

write32(info.registers + R600_ROM_CNTL, rom_cntl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

471

uint32 viph_control = read32(info.registers + RADEON_VIPH_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

472

uint32 bus_cntl = read32(info.registers + R600_BUS_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

473

uint32 d1vga_control = read32(info.registers + AVIVO_D1VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

474

uint32 d2vga_control = read32(info.registers + AVIVO_D2VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

476

= read32(info.registers + AVIVO_VGA_RENDER_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

477

uint32 rom_cntl = read32(info.registers + R600_ROM_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

478

uint32 general_pwrmgt = read32(info.registers + R600_GENERAL_PWRMGT);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

480

= read32(info.registers + R600_LOW_VID_LOWER_GPIO_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

482

= read32(info.registers + R600_MEDIUM_VID_LOWER_GPIO_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

484

= read32(info.registers + R600_HIGH_VID_LOWER_GPIO_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

486

= read32(info.registers + R600_CTXSW_VID_LOWER_GPIO_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

488

= read32(info.registers + R600_LOWER_GPIO_ENABLE);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

491

write32(info.registers + RADEON_VIPH_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

494

write32(info.registers + R600_BUS_CNTL, (bus_cntl & ~R600_BIOS_ROM_DIS));

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

496

write32(info.registers + AVIVO_D1VGA_CONTROL, (d1vga_control

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

499

write32(info.registers + AVIVO_D2VGA_CONTROL, (d2vga_control

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

502

write32(info.registers + AVIVO_VGA_RENDER_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

505

write32(info.registers + R600_ROM_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

509

write32(info.registers + R600_GENERAL_PWRMGT,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

511

write32(info.registers + R600_LOW_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

513

write32(info.registers + R600_MEDIUM_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

515

write32(info.registers + R600_HIGH_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

517

write32(info.registers + R600_CTXSW_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

519

write32(info.registers + R600_LOWER_GPIO_ENABLE,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

555

write32(info.registers + RADEON_VIPH_CONTROL, viph_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

556

write32(info.registers + R600_BUS_CNTL, bus_cntl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

557

write32(info.registers + AVIVO_D1VGA_CONTROL, d1vga_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

558

write32(info.registers + AVIVO_D2VGA_CONTROL, d2vga_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

559

write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vga_render_control);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

560

write32(info.registers + R600_ROM_CNTL, rom_cntl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

561

write32(info.registers + R600_GENERAL_PWRMGT, general_pwrmgt);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

562

write32(info.registers + R600_LOW_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

564

write32(info.registers + R600_MEDIUM_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

566

write32(info.registers + R600_HIGH_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

568

write32(info.registers + R600_CTXSW_VID_LOWER_GPIO_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

570

write32(info.registers + R600_LOWER_GPIO_ENABLE, lower_gpio_enable);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

580

uint32 sepromControl = read32(info.registers + RADEON_SEPROM_CNTL1);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

581

uint32 viphControl = read32(info.registers + RADEON_VIPH_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

582

uint32 busControl = read32(info.registers + RV370_BUS_CNTL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

583

uint32 d1vgaControl = read32(info.registers + AVIVO_D1VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

584

uint32 d2vgaControl = read32(info.registers + AVIVO_D2VGA_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

586

= read32(info.registers + AVIVO_VGA_RENDER_CONTROL);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

587

uint32 gpioPadA = read32(info.registers + RADEON_GPIOPAD_A);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

588

uint32 gpioPadEN = read32(info.registers + RADEON_GPIOPAD_EN);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

589

uint32 gpioPadMask = read32(info.registers + RADEON_GPIOPAD_MASK);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

591

write32(info.registers + RADEON_SEPROM_CNTL1,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

594

write32(info.registers + RADEON_GPIOPAD_A, 0);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

595

write32(info.registers + RADEON_GPIOPAD_EN, 0);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

596

write32(info.registers + RADEON_GPIOPAD_MASK, 0);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

599

write32(info.registers + RADEON_VIPH_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

603

write32(info.registers + RV370_BUS_CNTL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

607

write32(info.registers + AVIVO_D1VGA_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

610

write32(info.registers + AVIVO_D2VGA_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

613

write32(info.registers + AVIVO_VGA_RENDER_CONTROL,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

635

write32(info.registers + RADEON_SEPROM_CNTL1, sepromControl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

636

write32(info.registers + RADEON_VIPH_CONTROL, viphControl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

637

write32(info.registers + RV370_BUS_CNTL, busControl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

638

write32(info.registers + AVIVO_D1VGA_CONTROL, d1vgaControl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

639

write32(info.registers + AVIVO_D2VGA_CONTROL, d2vgaControl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

640

write32(info.registers + AVIVO_VGA_RENDER_CONTROL, vgaRenderControl);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

641

write32(info.registers + RADEON_GPIOPAD_A, gpioPadA);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

642

write32(info.registers + RADEON_GPIOPAD_EN, gpioPadEN);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

643

write32(info.registers + RADEON_GPIOPAD_MASK, gpioPadMask);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

701

(void**)&info.registers);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

713

= read32(info.registers + CONFIG_MEMSIZE_TAHITI) * 1024;

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

719

= read32(info.registers + CONFIG_MEMSIZE) * 1024;

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

726

= read32(info.registers + CONFIG_MEMSIZE) / 1024;

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

732

= read32(info.registers + CONFIG_MEMSIZE) / 1024;

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

738

uint32 tom = read32(info.registers + RADEON_NB_TOM);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

741

write32(info.registers + RADEON_CONFIG_MEMSIZE,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

745

= read32(info.registers + RADEON_CONFIG_MEMSIZE);

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd.cpp

749

write32(info.registers + RADEON_CONFIG_MEMSIZE,

src/add-ons/kernel/drivers/graphics/radeon_hd/radeon_hd_private.h

36

addr_t registers;

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

30

rawTemp = (read32(info.registers + SI_CG_MULT_THERMAL_STATUS)

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

40

uint32 offset = (read32(info.registers + EVERGREEN_CG_THERMAL_CTRL)

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

42

rawTemp = (read32(info.registers + EVERGREEN_CG_TS0_STATUS)

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

53

uint32 rawTemp = read32(info.registers + EVERGREEN_CG_THERMAL_STATUS)

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

59

rawTemp = (read32(info.registers + EVERGREEN_CG_MULT_THERMAL_STATUS)

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

74

rawTemp = (read32(info.registers + R700_CG_MULT_THERMAL_STATUS)

src/add-ons/kernel/drivers/graphics/radeon_hd/sensors.cpp

88

rawTemp = (read32(info.registers + R600_CG_THERMAL_STATUS)

src/add-ons/kernel/drivers/graphics/skeleton/driver.c

345

int registers = 1;

src/add-ons/kernel/drivers/graphics/skeleton/driver.c

379

di->pcii.u.h0.base_registers_pci[registers],

src/add-ons/kernel/drivers/graphics/skeleton/driver.c

380

di->pcii.u.h0.base_register_sizes[registers],

src/add-ons/kernel/drivers/graphics/via/driver.c

354

int registers = 1;

src/add-ons/kernel/drivers/graphics/via/driver.c

388

di->pcii.u.h0.base_registers_pci[registers],

src/add-ons/kernel/drivers/graphics/via/driver.c

389

di->pcii.u.h0.base_register_sizes[registers],

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

161

uint16 temp = read16(device->registers + PCH_THERMAL_TEMP);

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

312

B_KERNEL_READ_AREA | B_KERNEL_WRITE_AREA, (void**)&device->registers);

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

322

uint8 tsel = read8(device->registers + PCH_THERMAL_TSEL);

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

331

write8(device->registers + PCH_THERMAL_TSEL,

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

341

uint16 ctt = read16(device->registers + PCH_THERMAL_CTT);

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

345

uint16 phl = read16(device->registers + PCH_THERMAL_PHL);

src/add-ons/kernel/drivers/power/pch_thermal/pch_thermal.cpp

65

addr_t registers;

src/kits/debugger/arch/Architecture.cpp

63

const Register* registers = Registers();

src/kits/debugger/arch/Architecture.cpp

78

switch (registers[i].Type()) {

src/kits/debugger/arch/x86/disasm/DisassemblerX86.cpp

198

ZydisRegisterContext registers;

src/kits/debugger/arch/x86/disasm/DisassemblerX86.cpp

199

CpuStateToZydisRegContext(x86State, &registers);

src/kits/debugger/arch/x86/disasm/DisassemblerX86.cpp

201

address, &registers, &targetAddress));

src/kits/debugger/arch/x86_64/disasm/DisassemblerX8664.cpp

206

ZydisRegisterContext registers;

src/kits/debugger/arch/x86_64/disasm/DisassemblerX8664.cpp

207

CpuStateToZydisRegContext(x64State, &registers);

src/kits/debugger/arch/x86_64/disasm/DisassemblerX8664.cpp

209

address, &registers, &targetAddress));

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

177

UnwindTargetInterface(const Register* registers, int32 registerCount,

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

181

BasicTargetInterface(registers, registerCount, fromDwarfMap,

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

493

const Register* registers = fArchitecture->Registers();

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

508

= new(std::nothrow) BasicTargetInterface(registers, registerCount,

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

606

const Register* registers = fArchitecture->Registers();

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

627

= new(std::nothrow) UnwindTargetInterface(registers, registerCount,

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

636

= new(std::nothrow) UnwindTargetInterface(registers, registerCount,

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

663

const Register* reg = registers + i;

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

86

BasicTargetInterface(const Register* registers, int32 registerCount,

src/kits/debugger/debug_info/DwarfImageDebugInfo.cpp

90

fRegisters(registers),

src/kits/debugger/debug_info/DwarfTypes.cpp

395

const Register* registers = typeContext->GetArchitecture()->Registers();

src/kits/debugger/debug_info/DwarfTypes.cpp

411

if (registers[reg].BitSize() > piece.bitSize) {

src/kits/debugger/debug_info/DwarfTypes.cpp

412

piece.bitOffset = registers[reg].BitSize() - piece.bitSize

src/kits/debugger/value/ValueLoader.cpp

175

if (!fCpuState->GetRegisterValue(registers + piece.reg,

src/kits/debugger/value/ValueLoader.cpp

99

const Register* registers = fArchitecture->Registers();

src/kits/debugger/value/ValueWriter.cpp

65

const Register* registers = fArchitecture->Registers();

src/kits/debugger/value/ValueWriter.cpp

97

const Register* target = registers + piece.reg;

src/system/kernel/arch/arm/arch_debug.cpp

444

arch_debug_save_registers(struct arch_debug_registers* registers)

src/system/kernel/arch/arm64/arch_debug.cpp

426

arch_debug_save_registers(struct arch_debug_registers* registers)

src/system/kernel/arch/m68k/arch_debug.cpp

253

arch_debug_save_registers(struct arch_debug_registers* registers)

src/system/kernel/arch/ppc/arch_debug.cpp

260

arch_debug_save_registers(struct arch_debug_registers* registers)

src/system/kernel/arch/ppc/arch_debug.cpp

264

registers->r1 = (addr_t)frame->previous;

src/system/kernel/arch/riscv64/arch_debug.cpp

1085

uint64 registers[kRegisterCount] = {

src/system/kernel/arch/riscv64/arch_debug.cpp

1126

(uint64)B_HOST_TO_BENDIAN_INT64(registers[i]));

src/system/kernel/arch/riscv64/arch_debug.cpp

443

arch_debug_registers* registers = debug_get_debug_registers(

src/system/kernel/arch/riscv64/arch_debug.cpp

445

if (registers == NULL)

src/system/kernel/arch/riscv64/arch_debug.cpp

447

*_bp = registers->fp;

src/system/kernel/arch/riscv64/arch_debug.cpp

854

arch_debug_save_registers(arch_debug_registers* registers)

src/system/kernel/arch/riscv64/arch_debug.cpp

858

registers->fp = (addr_t)frame->previous;

src/system/kernel/arch/riscv64/arch_debug.cpp

883

arch_debug_registers* registers = debug_get_debug_registers(

src/system/kernel/arch/riscv64/arch_debug.cpp

885

if (registers == NULL)

src/system/kernel/arch/riscv64/arch_debug.cpp

887

fp = registers->fp;

src/system/kernel/arch/sparc/arch_debug.cpp

28

arch_debug_save_registers(struct arch_debug_registers* registers)

src/system/kernel/arch/x86/arch_debug.cpp

1043

arch_debug_save_registers(arch_debug_registers* registers)

src/system/kernel/arch/x86/arch_debug.cpp

1047

registers->bp = (addr_t)frame->previous;

src/system/kernel/arch/x86/arch_debug.cpp

1072

arch_debug_registers* registers = debug_get_debug_registers(

src/system/kernel/arch/x86/arch_debug.cpp

1074

if (registers == NULL)

src/system/kernel/arch/x86/arch_debug.cpp

1076

bp = registers->bp;

src/system/kernel/arch/x86/arch_debug.cpp

1297

gdb_register registers[kRegisterCount] = {

src/system/kernel/arch/x86/arch_debug.cpp

1322

gdb_register registers[kRegisterCount] = {

src/system/kernel/arch/x86/arch_debug.cpp

1340

switch (registers[i].type) {

src/system/kernel/arch/x86/arch_debug.cpp

1343

(uint64)B_HOST_TO_BENDIAN_INT64(registers[i].value));

src/system/kernel/arch/x86/arch_debug.cpp

1347

(uint32)B_HOST_TO_BENDIAN_INT32((uint32)registers[i].value));

src/system/kernel/arch/x86/arch_debug.cpp

492

arch_debug_registers* registers = debug_get_debug_registers(

src/system/kernel/arch/x86/arch_debug.cpp

494

if (registers == NULL)

src/system/kernel/arch/x86/arch_debug.cpp

496

*_bp = registers->bp;

src/system/kernel/arch/x86/ioapic.cpp

105

ioapic_registers* registers;

src/system/kernel/arch/x86/ioapic.cpp

152

ioapic.registers->io_register_select = registerSelect;

src/system/kernel/arch/x86/ioapic.cpp

153

return ioapic.registers->io_window_register;

src/system/kernel/arch/x86/ioapic.cpp

160

ioapic.registers->io_register_select = registerSelect;

src/system/kernel/arch/x86/ioapic.cpp

161

ioapic.registers->io_window_register = value;

src/system/kernel/arch/x86/ioapic.cpp

168

ioapic.registers->io_register_select = registerSelect + 1;

src/system/kernel/arch/x86/ioapic.cpp

169

uint64 result = ioapic.registers->io_window_register;

src/system/kernel/arch/x86/ioapic.cpp

171

ioapic.registers->io_register_select = registerSelect;

src/system/kernel/arch/x86/ioapic.cpp

172

result |= ioapic.registers->io_window_register;

src/system/kernel/arch/x86/ioapic.cpp

181

ioapic.registers->io_register_select

src/system/kernel/arch/x86/ioapic.cpp

183

ioapic.registers->io_window_register

src/system/kernel/arch/x86/ioapic.cpp

185

ioapic.registers->io_register_select

src/system/kernel/arch/x86/ioapic.cpp

187

ioapic.registers->io_window_register

src/system/kernel/arch/x86/ioapic.cpp

335

(void**)&ioapic.registers, ioapic.registers != NULL ? B_EXACT_ADDRESS

src/system/kernel/arch/x86/ioapic.cpp

337

| B_KERNEL_WRITE_AREA, physicalAddress, ioapic.registers != NULL);

src/system/kernel/arch/x86/ioapic.cpp

343

TRACE("mapped io-apic %u to %p\n", ioapic.number, ioapic.registers);

src/system/kernel/arch/x86/ioapic.cpp

351

ioapic.registers = NULL;

src/system/kernel/arch/x86/ioapic.cpp

454

ioapic->registers = NULL;