headers/private/graphics/intel_extreme/intel_extreme.h

478

struct pll_info pll_info;

src/add-ons/accelerants/intel_extreme/Pipes.cpp

422

float refFreq = gInfo->shared_info->pll_info.reference_frequency / 1000.0f;

src/add-ons/accelerants/intel_extreme/Ports.cpp

2709

gInfo->shared_info->pll_info.reference_frequency,

src/add-ons/accelerants/intel_extreme/TigerLakePLL.cpp

242

int ref_khz = gInfo->shared_info->pll_info.reference_frequency;

src/add-ons/accelerants/intel_extreme/accelerant.cpp

635

info->dac_speed = gInfo->shared_info->pll_info.max_frequency;

src/add-ons/accelerants/intel_extreme/mode.cpp

115

gInfo->shared_info->pll_info.min_frequency,

src/add-ons/accelerants/intel_extreme/mode.cpp

116

gInfo->shared_info->pll_info.max_frequency,

src/add-ons/accelerants/intel_extreme/mode.cpp

753

if (low < gInfo->shared_info->pll_info.min_frequency)

src/add-ons/accelerants/intel_extreme/mode.cpp

754

low = gInfo->shared_info->pll_info.min_frequency;

src/add-ons/accelerants/intel_extreme/mode.cpp

755

else if (low > gInfo->shared_info->pll_info.max_frequency)

src/add-ons/accelerants/intel_extreme/mode.cpp

762

*_high = gInfo->shared_info->pll_info.max_frequency;

src/add-ons/accelerants/intel_extreme/pll.cpp

203

pll_info &info = gInfo->shared_info->pll_info;

src/add-ons/accelerants/intel_extreme/pll.cpp

276

= gInfo->shared_info->pll_info.reference_frequency / 1000.0f;

src/add-ons/accelerants/intel_extreme/pll.cpp

370

= gInfo->shared_info->pll_info.reference_frequency / 1000.0f;

src/add-ons/accelerants/radeon/impactv.c

328

pll_info tv_pll, crt_pll;

src/add-ons/accelerants/radeon/pll.c

211

const pll_info *pll,

src/add-ons/accelerants/radeon/pll.c

348

void Radeon_GetTVPLLConfiguration( const general_pll_info *general_pll, pll_info *pll,

src/add-ons/accelerants/radeon/pll.c

373

void Radeon_GetTVCRTPLLConfiguration( const general_pll_info *general_pll, pll_info *pll,

src/add-ons/accelerants/radeon/pll.c

410

pll_info pll;

src/add-ons/accelerants/radeon/pll.c

52

const pll_info *pll, uint32 freq, uint fixed_post_div, pll_dividers *dividers )

src/add-ons/accelerants/radeon/set_mode.h

218

void Radeon_CalcPLLDividers( const pll_info *pll, uint32 freq, uint fixed_post_div, pll_dividers *dividers );

src/add-ons/accelerants/radeon/set_mode.h

220

const pll_info *pll,

src/add-ons/accelerants/radeon/set_mode.h

226

void Radeon_GetTVPLLConfiguration( const general_pll_info *general_pll, pll_info *pll,

src/add-ons/accelerants/radeon/set_mode.h

228

void Radeon_GetTVCRTPLLConfiguration( const general_pll_info *general_pll, pll_info *pll,

src/add-ons/accelerants/radeon_hd/accelerant.h

151

struct pll_info pll;

src/add-ons/accelerants/radeon_hd/display.cpp

998

display_crtc_ss(pll_info* pll, int command)

src/add-ons/accelerants/radeon_hd/display.h

24

void display_crtc_ss(pll_info* pll, int command);

src/add-ons/accelerants/radeon_hd/displayport.cpp

650

pll_info* pll = &gConnector[connectorIndex]->encoder.pll;

src/add-ons/accelerants/radeon_hd/encoder.cpp

1333

pll_info* pll = &gConnector[connectorIndex]->encoder.pll;

src/add-ons/accelerants/radeon_hd/encoder.cpp

1997

pll_info* pll = &connector->encoder.pll;

src/add-ons/accelerants/radeon_hd/encoder.cpp

394

pll_info* pll = &gConnector[connectorIndex]->encoder.pll;

src/add-ons/accelerants/radeon_hd/gpu.cpp

765

radeon_gpu_ss_control(pll_info* pll, bool enable)

src/add-ons/accelerants/radeon_hd/gpu.h

184

status_t radeon_gpu_ss_control(pll_info* pll, bool enable);

src/add-ons/accelerants/radeon_hd/mode.cpp

218

pll_info* pll = &gConnector[connectorIndex]->encoder.pll;

src/add-ons/accelerants/radeon_hd/mode.cpp

485

pll_info* pll = &connector->encoder.pll;

src/add-ons/accelerants/radeon_hd/pll.cpp

1141

pll_info pll;

src/add-ons/accelerants/radeon_hd/pll.cpp

1165

pll_info* pll = &gConnector[id]->encoder.pll;

src/add-ons/accelerants/radeon_hd/pll.cpp

1185

pll_info* pll = &gConnector[id]->encoder.pll;

src/add-ons/accelerants/radeon_hd/pll.cpp

1206

pll_info* pll = &gConnector[id]->encoder.pll;

src/add-ons/accelerants/radeon_hd/pll.cpp

1250

pll_info* pll = &gConnector[connectorIndex]->encoder.pll;

src/add-ons/accelerants/radeon_hd/pll.cpp

163

pll_ppll_ss_probe(pll_info* pll, uint32 ssID)

src/add-ons/accelerants/radeon_hd/pll.cpp

207

pll_asic_ss_probe(pll_info* pll, uint32 ssID)

src/add-ons/accelerants/radeon_hd/pll.cpp

345

pll_compute_post_divider(pll_info* pll)

src/add-ons/accelerants/radeon_hd/pll.cpp

393

pll_compute(pll_info* pll)

src/add-ons/accelerants/radeon_hd/pll.cpp

540

pll_setup_flags(pll_info* pll, uint8 crtcID)

src/add-ons/accelerants/radeon_hd/pll.cpp

595

pll_adjust(pll_info* pll, display_mode* mode, uint8 crtcID)

src/add-ons/accelerants/radeon_hd/pll.cpp

71

pll_limit_probe(pll_info* pll)

src/add-ons/accelerants/radeon_hd/pll.cpp

750

pll_info* pll = &gConnector[connectorIndex]->encoder.pll;

src/add-ons/accelerants/radeon_hd/pll.h

108

status_t pll_adjust(pll_info* pll, display_mode* mode, uint8 crtcID);

src/add-ons/accelerants/radeon_hd/pll.h

113

status_t pll_compute(pll_info* pll);

src/add-ons/accelerants/radeon_hd/pll.h

114

void pll_setup_flags(pll_info* pll, uint8 crtcID);

src/add-ons/accelerants/radeon_hd/pll.h

115

status_t pll_limit_probe(pll_info* pll);

src/add-ons/accelerants/radeon_hd/pll.h

116

status_t pll_ppll_ss_probe(pll_info* pll, uint32 ssID);

src/add-ons/accelerants/radeon_hd/pll.h

117

status_t pll_asic_ss_probe(pll_info* pll, uint32 ssID);

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

765

info.shared_info->pll_info.reference_frequency = 120000;// 120 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

766

info.shared_info->pll_info.max_frequency = 350000;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

768

info.shared_info->pll_info.min_frequency = 20000; // 20 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

770

info.shared_info->pll_info.reference_frequency = 96000; // 96 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

771

info.shared_info->pll_info.max_frequency = 400000;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

773

info.shared_info->pll_info.min_frequency = 20000; // 20 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

775

info.shared_info->pll_info.reference_frequency = 135000;// 135 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

776

info.shared_info->pll_info.max_frequency = 350000;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

778

info.shared_info->pll_info.min_frequency = 25000; // 25 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

781

info.shared_info->pll_info.reference_frequency = 24000; // 24 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

782

info.shared_info->pll_info.max_frequency = 350000;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

784

info.shared_info->pll_info.min_frequency = 25000; // 25 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

790

info.shared_info->pll_info.reference_frequency = 24000; // 24 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

793

info.shared_info->pll_info.reference_frequency = 19200; // 19.2 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

796

info.shared_info->pll_info.reference_frequency = 38400; // 38.4 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

800

info.shared_info->pll_info.reference_frequency = 24000; // 24 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

803

info.shared_info->pll_info.max_frequency = 350000;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

805

info.shared_info->pll_info.min_frequency = 25000; // 25 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

807

info.shared_info->pll_info.reference_frequency = 48000; // 48 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

808

info.shared_info->pll_info.max_frequency = 350000;

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

810

info.shared_info->pll_info.min_frequency = 25000; // 25 MHz

src/add-ons/kernel/drivers/graphics/intel_extreme/intel_extreme.cpp

813

info.shared_info->pll_info.divisor_register = INTEL_DISPLAY_A_PLL_DIVISOR_0;

src/add-ons/kernel/drivers/graphics/radeon/bios.c

120

PLL_BLOCK pll, *pll_info;

src/add-ons/kernel/drivers/graphics/radeon/bios.c

123

pll_info = (PLL_BLOCK *)(di->rom.rom_ptr + *(uint16 *)(bios_header + 0x30));

src/add-ons/kernel/drivers/graphics/radeon/bios.c

171

memcpy( &pll, pll_info, sizeof( pll ));

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

101

gInfo->shared_info->pll_info.reference_frequency = 96000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

102

gInfo->shared_info->pll_info.max_frequency = 400000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

103

gInfo->shared_info->pll_info.min_frequency = 20000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

113

gInfo->shared_info->pll_info.reference_frequency * output.m

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

90

gInfo->shared_info->pll_info.reference_frequency = 120000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

91

gInfo->shared_info->pll_info.max_frequency = 350000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

92

gInfo->shared_info->pll_info.min_frequency = 20000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

96

gInfo->shared_info->pll_info.reference_frequency = 96000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

97

gInfo->shared_info->pll_info.max_frequency = 400000;

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

98

gInfo->shared_info->pll_info.min_frequency = 20000;