src/add-ons/accelerants/intel_extreme/Pipes.cpp

401

Pipe::ConfigureClocks(const pll_divisors& divisors, uint32 pixelClock,

src/add-ons/accelerants/intel_extreme/Pipes.h

53

const pll_divisors& divisors,

src/add-ons/accelerants/intel_extreme/Ports.cpp

1043

pll_divisors divisors;

src/add-ons/accelerants/intel_extreme/Ports.cpp

1289

pll_divisors divisors;

src/add-ons/accelerants/intel_extreme/Ports.cpp

1492

pll_divisors divisors;

src/add-ons/accelerants/intel_extreme/mode.cpp

436

pll_divisors divisors;

src/add-ons/accelerants/intel_extreme/pll.cpp

201

valid_pll_divisors(pll_divisors* divisors, pll_limits* limits)

src/add-ons/accelerants/intel_extreme/pll.cpp

218

compute_pll_p2(display_timing* current, pll_divisors* divisors,

src/add-ons/accelerants/intel_extreme/pll.cpp

249

compute_pll_m(pll_divisors* divisors)

src/add-ons/accelerants/intel_extreme/pll.cpp

265

compute_pll_p(pll_divisors* divisors)

src/add-ons/accelerants/intel_extreme/pll.cpp

272

compute_dpll_g4x(display_timing* current, pll_divisors* divisors, bool isLVDS)

src/add-ons/accelerants/intel_extreme/pll.cpp

328

pll_divisors bestDivisors;

src/add-ons/accelerants/intel_extreme/pll.cpp

366

compute_dpll_9xx(display_timing* current, pll_divisors* divisors, bool isLVDS)

src/add-ons/accelerants/intel_extreme/pll.cpp

405

pll_divisors bestDivisors;

src/add-ons/accelerants/intel_extreme/pll.cpp

450

compute_pll_divisors(display_timing* current, pll_divisors* divisors, bool isLVDS)

src/add-ons/accelerants/intel_extreme/pll.h

27

pll_divisors min;

src/add-ons/accelerants/intel_extreme/pll.h

28

pll_divisors max;

src/add-ons/accelerants/intel_extreme/pll.h

44

bool valid_pll_divisors(pll_divisors* divisors, pll_limits* limits);

src/add-ons/accelerants/intel_extreme/pll.h

45

void compute_pll_divisors(display_timing* current, pll_divisors* divisors,

src/tests/add-ons/accelerants/intel_extreme/PllTest.cpp

106

pll_divisors output;