outb
void (X86APIP outb) (X86EMU_pioAddr addr, u8 val);
#define bus_outb(b,v,p) outb(b,v,p)
#define npx_full_reset() outb(IO_NPX + 1, 0)
outb(sym_scratcha, 0x42);
outb(sym_scratcha+1, 0x00);
outb(sym_scratchb, 0x04);
outb(sym_sien0, 0);
outb(sym_sien1, 0);
outb(sym_dien, sym_dien_sir);
outb(sym_dmode, /*( sym_dmode_diom | sym_dmode_siom, 0 )*/ 0); /* FIXME: ??? */
outb(sym_dien , 0); /* mask all dma interrupts */
outb(sym_scntl3, 4); /* set pre-scaler to divide by 3 */
outb(sym_stime1, 0); /* disable general purpose timer */
outb(sym_stime1, 11); /* delay of 128ms */
outb(sym_stime1, 0); /* disable general purpose timer */
outb(sym_istat, sym_istat_srst);
outb(sym_istat, 0);
outb(sym_scntl0, sym_scntl0_arb0 | sym_scntl0_arb1);
outb(sym_scntl1, 0);
outb(sym_scntl2, 0);
outb(sym_respid, id_bits[s->host_targ_id]);
outb(sym_scid, sym_scid_rre | s->host_targ_id);
outb(sym_dmode, 0);
outb(sym_stest2, 0); // save diff bit
outb(sym_stest3, 0);
outb(sym_stest1, 0); /* make sure clock doubler is OFF */
outb(sym_stest1, 0x08); /* enable doubler */
outb(sym_stest3, 0xa0); /* halt sclk, enable TolerANT*/
outb(sym_scntl3, 0x05); /* SCLK/4 */
outb(sym_stest1, 0x0c); /* engage doubler */
outb(sym_stest3, 0x80); /* reenable sclk, leave TolerANT on */
outb(sym_stest1, 0x08); /* enable doubler */
outb(sym_stest3, 0xa0); /* halt sclk, enable TolerANT*/
outb(sym_scntl3, 0x05); /* SCLK/4 */
outb(sym_stest1, 0x0c); /* engage doubler */
outb(sym_stest3, 0x80); /* reenable sclk, leave TolerANT on */
outb(sym_stest3, 0x80); /* leave TolerANT on */
if(s->status == IDLE) outb(sym_istat, sym_istat_sigp);
outb(sym_ctest3, 0x04);
outb(sym_scntl1, sym_scntl1_rst);
outb(sym_scntl1, 0);
outb(sym_dcntl, sym_dcntl_com);
outb(sym_dien, sym_dien_sir | sym_dien_mdpe | sym_dien_bf | sym_dien_abrt
outb(sym_sien0, sym_sien0_ma | sym_sien0_sge | sym_sien0_udc | sym_sien0_rst |
outb(sym_sien1, sym_sien1_sto | sym_sien1_sbmc); // XXX
outb(sym_stime0, 0xbb);
outb(BL_CONTROL_REG, BL_CONTROL_RINT);
outb(BL_COMMAND_REG, command);
outb(BL_COMMAND_REG, *_in);
outb(BL_CONTROL_REG, BL_CONTROL_RHARD);
outb(BL_COMMAND_REG, 0x00);
outb(BL_COMMAND_REG, 0x02);
outb(0x78, 0x09 + i);
outb(0x78, 0x12);
outb(bsh + offset, value);
outb(addr, value);
outb(addr, value);
outb(addr2, inb(addr1));
outb(addr2, inb(addr1));
outb(0x22, reg);
outb(0x22, reg);
outb(0x23, data);
void outb(u_int port, u_char data);
void outb(u_int port, u_char data);
unchecked_decompress_buf(outb, out_len, inb, sizeof(inb));
unchecked_decompress_buf(outb, out_len, inb, sizeof(inb));
unsigned char outb[BLOCK_SIZE];
unsigned char *b = outb;
out_len = compress_buf(inb, in_len, outb, sizeof (outb));
unchecked_decompress_buf(inb, in_len, outb, sizeof(outb));
if (fwrite(outb, out_len, 1, to) != 1)
unsigned char outb[BLOCK_SIZE];
dumb_memcpy(outb, inb, in_len);
dumb_memcpy(outb, inb, in_len);
compress_buf(inb, in_len, outb, sizeof(outb));
compress_buf(inb, in_len, outb, sizeof(outb));
out_len = compress_buf(inb, in_len, outb, sizeof(outb));
sys_outb = funcs->outb;