iwn_prph_write
iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) | mask);
iwn_prph_write(sc, addr, iwn_prph_read(sc, addr) & ~mask);
iwn_prph_write(sc, addr, *data);
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), ssn);
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), ssn);
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN4965_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
iwn_prph_write(sc, IWN4965_SCHED_QCHAIN_SEL, 0);
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_RDPTR(qid), 0);
iwn_prph_write(sc, IWN4965_SCHED_INTR_MASK, 0xffff);
iwn_prph_write(sc, IWN4965_SCHED_TXFACT, 0xff);
iwn_prph_write(sc, IWN4965_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN5000_SCHED_DRAM_ADDR, sc->sched_dma.paddr >> 10);
iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffdf);
iwn_prph_write(sc, IWN5000_SCHED_QCHAIN_SEL, 0xfffef);
iwn_prph_write(sc, IWN5000_SCHED_AGGR_SEL, 0);
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_RDPTR(qid), 0);
iwn_prph_write(sc, IWN5000_SCHED_INTR_MASK, 0xfffff);
iwn_prph_write(sc, IWN5000_SCHED_TXFACT, 0xff);
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN5000_SCHED_QUEUE_STATUS(qid),
iwn_prph_write(sc, IWN_BSM_WR_MEM_SRC, 0);
iwn_prph_write(sc, IWN_BSM_WR_MEM_DST, IWN_FW_TEXT_BASE);
iwn_prph_write(sc, IWN_BSM_WR_DWCOUNT, size);
iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START);
iwn_prph_write(sc, IWN_BSM_WR_CTRL, IWN_BSM_WR_CTRL_START_EN);
iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->init.datasz);
iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE, fw->init.textsz);
iwn_prph_write(sc, IWN_BSM_DRAM_DATA_ADDR, dma->paddr >> 4);
iwn_prph_write(sc, IWN_BSM_DRAM_DATA_SIZE, fw->main.datasz);
iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_ADDR,
iwn_prph_write(sc, IWN_BSM_DRAM_TEXT_SIZE,
iwn_prph_write(sc, IWN_APMG_CLK_EN,
iwn_prph_write(sc, IWN_APMG_CLK_EN,
iwn_prph_write(sc, IWN_APMG_DIGITAL_SVR, tmp);
iwn_prph_write(sc, sc->sched_txfact_addr, 0);
iwn_prph_write(sc, sc->sched_txfact_addr, 0);
iwn_prph_write(sc, IWN_APMG_CLK_DIS,