iwm_read_prph
hw_step = iwm_read_prph(sc, IWM_WFPM_CTRL_REG);
hw_step = iwm_read_prph(sc, IWM_AUX_MISC_REG);
val = iwm_read_prph(sc, reg) & mask;
if (iwm_read_prph(sc, IWM_RFH_GEN_STATUS) &
iwm_read_prph(sc, IWM_OSC_CLK);
iwm_read_prph(sc, IWM_OSC_CLK);
iwm_read_prph(sc, IWM_OSC_CLK);
iwm_read_prph(sc, IWM_OSC_CLK);
iwm_read_prph(sc, IWM_SCD_EN_CTRL) | (1 << qid));
base = iwm_read_prph(sc, IWM_SCD_SRAM_BASE_ADDR);
uint32_t iwm_read_prph(struct iwm_softc *, uint32_t);
mac_addr0 = htole32(iwm_read_prph(sc, IWM_WFMP_MAC_ADDR_0));
mac_addr1 = htole32(iwm_read_prph(sc, IWM_WFMP_MAC_ADDR_1));