isWrite
bool isWrite, size_t* _bytesTransferred);
status_t vm_page_fault(addr_t address, addr_t faultAddress, bool isWrite,
uint64 isWrite: 1;
bool isWrite;
send_slave_address(const i2c_bus *bus, uint8 slaveAddress, bool isWrite)
status = send_byte(bus, (slaveAddress & 0xfe) | (isWrite ? 0 : 1), true);
void SetIsWrite(bool isWrite);
ATARequest::SetIsWrite(bool isWrite)
fIsWrite = isWrite;
bool isWrite = operation->IsWrite();
isWrite ? "Write" : "Read", length, offset);
isWrite ? ATA_COMMAND_WRITE_DMA_EXT : ATA_COMMAND_READ_DMA_EXT,
sreq->SetATA28Command(isWrite
ExecuteSataRequest(sreq, isWrite);
AHCIPort::ExecuteSataRequest(sata_request* request, bool isWrite)
if (isWrite)
bool isWrite = false;
isWrite = true;
ExecuteSataRequest(sreq, isWrite);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_6;
ScsiReadWrite(request, position, length, isWrite);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_10;
ScsiReadWrite(request, position, length, isWrite);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_12;
ScsiReadWrite(request, position, length, isWrite);
bool isWrite = request->cdb[0] == SCSI_OP_WRITE_16;
ScsiReadWrite(request, position, length, isWrite);
bool isWrite)
isWrite);
if (isWrite) {
void ScsiReadWrite(scsi_ccb *request, uint64 lba, size_t sectorCount, bool isWrite);
void ExecuteSataRequest(sata_request *request, bool isWrite = false);
void SetIsWrite(bool isWrite);
VirtioSCSIRequest::SetIsWrite(bool isWrite)
fIsWrite = isWrite;
cache_get_pages(VMCache* cache, off_t offset, off_t length, bool isWrite, vm_page** pages)
if (isWrite && missingPages > 0) {
bool isWrite = operation->IsWrite();
cache_get_pages(fCache, offset, length, isWrite, pages);
if (isWrite)
error = _CopyData(page, vecs, vecOffset, isWrite);
size_t* bytesProcessed, bool isWrite, bool retriesAllowed)
cache_get_pages(fCache, rounded_offset, rounded_len, isWrite, pages);
if (isWrite) {
error = _DoCacheIO(offset, buffer, length, &processed, isWrite, false);
size_t* bytesProcessed, bool isWrite, bool retriesAllowed = true);
request->isWrite = ioRequest->IsWrite();
bool isWrite;
IORequestInfo(int32 id, bool isWrite, off_t offset, size_t length,
isWrite(isWrite),
isWrite(other.isWrite),
IORequestInfo requestInfo(request->request, request->isWrite,
FileCookie alternativeCookie(requestInfo.isWrite ? O_WRONLY : O_RDONLY);
if (requestInfo.isWrite) {
buffer, bytes, requestInfo.isWrite);
if (error == B_OK && !requestInfo.isWrite) {
off_t pos, char* buffer, size_t& bytes, bool isWrite);
return ((HaikuKernelIORequest*)request)->isWrite;
physical_entry* vecs, size_t vecCount, bool isWrite,
request->flags = isWrite ? SCSI_DIR_OUT : SCSI_DIR_IN;
cmd->opcode = isWrite ? SCSI_OP_WRITE_6 : SCSI_OP_READ_6;
cmd->opcode = isWrite ? SCSI_OP_WRITE_10 : SCSI_OP_READ_10;
cmd->opcode = isWrite ? SCSI_OP_WRITE_12 : SCSI_OP_READ_12;
cmd->opcode = isWrite ? SCSI_OP_WRITE_16 : SCSI_OP_READ_16;
if (res.error_code == B_DEV_READ_ERROR && isWrite)
bool isWrite, size_t* _bytesTransferred)
isWrite, _bytesTransferred);
bool isWrite, size_t* _bytesTransferred);
if (!pte[i].isRead && !pte[i].isWrite && !pte[i].isExec) {
Pte {.isRead = true, .isWrite = true}.val);
Pte {.isRead = true, .isWrite = true, .isExec = true}.val);
Pte {.isRead = true, .isWrite = true, .isExec = true}.val);
MapRange(virtAdr, physAdr, size, Pte {.isRead = true, .isWrite = true, .isExec = true}.val);
MapAddrRange(gKernelArgs.arch_args.clint, Pte {.isRead = true, .isWrite = true}.val);
MapAddrRange(gKernelArgs.arch_args.htif, Pte {.isRead = true, .isWrite = true}.val);
MapAddrRange(gKernelArgs.arch_args.plic, Pte {.isRead = true, .isWrite = true}.val);
Pte {.isRead = true, .isWrite = true}.val);
Pte {.isRead = true, .isWrite = true}.val);
Pte {.isRead = true, .isWrite = true}.val);
Pte {.isRead = true, .isWrite = true, .isExec = true}.val);
.isWrite = (region->protection & B_WRITE_AREA) != 0,
MapAddrRange(gKernelArgs.arch_args.clint, Pte {.isRead = true, .isWrite = true}.val);
MapAddrRange(gKernelArgs.arch_args.htif, Pte {.isRead = true, .isWrite = true}.val);
MapAddrRange(gKernelArgs.arch_args.plic, Pte {.isRead = true, .isWrite = true}.val);
Pte {.isRead = true, .isWrite = true}.val);
arch_arm_handle_access_flag_fault(addr_t far, uint32 fsr, bool isWrite, bool isExec)
if (isWrite && ((fsr & (FSR_FS_MASK | FSR_LPAE_MASK)) == FSR_FS_PERMISSION_FAULT_L2)) {
arch_arm_page_fault(struct iframe *frame, addr_t far, uint32 fsr, bool isWrite, bool isExec)
if (arch_arm_handle_access_flag_fault(far, fsr, isWrite, isExec))
dprintf("FAR: %08lx, FSR: %08x, isUser: %d, isWrite: %d, isExec: %d, thread: %s\n", far, fsr, isUser, isWrite, isExec, thread->name);
isWrite ? DEBUG_PAGE_FAULT_WRITE : 0);
isWrite ? DEBUG_PAGE_FAULT_WRITE : 0);
vm_page_fault(far, frame->pc, isWrite, isExec, isUser, &newip);
bool isWrite = (dfsr & FSR_WNR) == FSR_WNR;
arch_arm_page_fault(frame, dfar, dfsr, isWrite, false);
newPte.isWrite = true;
newPte.isWrite = true;
if (pteVal.isWrite)
if (pteVal.isWrite)
newPte.isWrite = (attributes & B_WRITE_AREA) != 0;
newPte.isWrite = (attributes & B_KERNEL_WRITE_AREA) != 0;
if (isWrite) {
SetAccessedFlags(addr_t addr, bool isWrite)
if (!pte[i].isRead && !pte[i].isWrite && !pte[i].isExec) {
.isWrite = (attributes & B_KERNEL_WRITE_AREA) != 0,
bool isWrite)
isWrite ? "write" : "read"));
if (offset != ref->LastAccess(previous, isWrite))
ref->SetLastAccess(index, offset + bytes, isWrite);
size_t reservePages, bool isWrite)
if (isWrite) {
inline void SetLastAccess(int32 index, off_t access, bool isWrite)
last_access[index] = isWrite ? -access : access;
inline off_t LastAccess(int32 index, bool isWrite) const
return isWrite ? -last_access[index] : last_access[index];
inline uint32 LastAccessPageOffset(int32 index, bool isWrite)
return LastAccess(index, isWrite) >> PAGE_SHIFT;
void* buffer, size_t* _length, bool isWrite)
status_t status = request.Init(pos, (addr_t)buffer, *_length, isWrite, 0);
void* buffer, size_t* _length, bool isWrite);
IOCache::_TransferPages(size_t firstPage, size_t pageCount, bool isWrite,
", write: %d, vip: %d)\n", this, firstPage, pageCount, isWrite, isVIP);
requestLength, isWrite,
size_t pageCount, bool isWrite, bool isVIP);
IOBuffer::LockMemory(team_id team, bool isWrite)
fVecs[i].length, isWrite ? 0 : B_READ_DEVICE);
_UnlockMemory(team, i, isWrite);
IOBuffer::_UnlockMemory(team_id team, size_t count, bool isWrite)
isWrite ? 0 : B_READ_DEVICE);
IOBuffer::UnlockMemory(team_id team, bool isWrite)
_UnlockMemory(team, fVecCount, isWrite);
IOOperation::_CopyPartialBegin(bool isWrite, bool& singleBlockOnly)
isWrite ? "write" : "read", singleBlockOnly);
if (isWrite) {
IOOperation::_CopyPartialEnd(bool isWrite)
TRACE("_CopyPartialEnd(%s)\n", isWrite ? "write" : "read");
if (isWrite)
status_t _CopyPartialBegin(bool isWrite,
status_t _CopyPartialEnd(bool isWrite);
status_t LockMemory(team_id team, bool isWrite);
void UnlockMemory(team_id team, bool isWrite);
bool isWrite);
bool isWrite, bool isExecute, bool isUser, vm_page** wirePage);
vm_page_fault(addr_t address, addr_t faultAddress, bool isWrite, bool isExecute,
TPF(PageFaultStart(address, isWrite, isUser, faultAddress));
status = vm_soft_fault(addressSpace, pageAddress, isWrite, isExecute,
strerror(status), address, faultAddress, isWrite, isExecute,
isWrite ? "write" : (isExecute ? "execute" : "read"), address,
bool isWrite;
PageFaultContext(VMAddressSpace* addressSpace, bool isWrite)
isWrite(isWrite)
} else if (page->Cache() != context.topCache && context.isWrite) {
bool isWrite, bool isExecute, bool isUser, vm_page** wirePage)
originalAddress, isWrite, isUser));
PageFaultContext context(addressSpace, isWrite);
if (isWrite && (protection
} else if (!isWrite && !isExecute && (protection
if (context.page->Cache() != context.topCache && !isWrite)
Test& AddTest(off_t offset, size_t length, bool isWrite, uint32 flags)
Test* test = new(std::nothrow) Test(*this, offset, length, isWrite,
Test::Test(TestSuite& suite, off_t offset, size_t length, bool isWrite,
fIsWrite(isWrite),
bool isWrite, uint32 flags);
bool isWrite = operation->IsWrite();
status_t error = _TransferBlock(vecs, vecOffset, offset, isWrite);
generic_size_t& vecOffset, off_t offset, bool isWrite)
if (isWrite) {
ssize_t transferred = isWrite
if (!isWrite) {