fp_info
fp_info flatpanels[2]; // info about connected flat panels (if any)
fp_info *fpInfo = &ai->si->flatpanels[0];
fp_info *flatpanel = &si->flatpanels[crtc->flatpanel_port];
fp_info *fp_info = &si->flatpanels[0]; //todo fix the hardcoding what about ext dvi?
mode.virtual_width = mode.timing.h_display = fp_info->panel_xres;
mode.virtual_height = mode.timing.v_display = fp_info->panel_yres;
mode.timing.h_total = mode.timing.h_display + fp_info->h_blank;
mode.timing.h_sync_start = mode.timing.h_display + fp_info->h_over_plus;
mode.timing.h_sync_end = mode.timing.h_sync_start + fp_info->h_sync_width;
mode.timing.v_total = mode.timing.v_display + fp_info->v_blank;
mode.timing.v_sync_start = mode.timing.v_display + fp_info->v_over_plus;
mode.timing.v_sync_end = mode.timing.v_sync_start + fp_info->v_sync_width;
mode.timing.pixel_clock = fp_info->dot_clock;
fp_info *fp_info;
fp_info = &si->flatpanels[crtc->flatpanel_port];
if( mode->timing.h_display > fp_info->panel_xres )
mode->timing.h_display = fp_info->panel_xres;
if( mode->timing.v_display > fp_info->panel_yres )
mode->timing.v_display = fp_info->panel_yres;
if( mode->timing.h_display < fp_info->panel_xres )
mode->timing.h_display = fp_info->panel_xres;
if( mode->timing.v_display < fp_info->panel_yres )
mode->timing.v_display = fp_info->panel_yres;
mode->timing.h_total = mode->timing.h_display + fp_info->h_blank;
mode->timing.h_sync_start = mode->timing.h_display + fp_info->h_over_plus;
mode->timing.h_sync_end = mode->timing.h_sync_start + fp_info->h_sync_width;
mode->timing.v_total = mode->timing.v_display + fp_info->v_blank;
mode->timing.v_sync_start = mode->timing.v_display + fp_info->v_over_plus;
mode->timing.v_sync_end = mode->timing.v_sync_start + fp_info->v_sync_width;
mode->timing.pixel_clock = fp_info->dot_clock;
Radeon_CalcRMXRegisters( fp_info, mode,
Radeon_CalcFPRegisters( ai, crtc, fp_info, &crtc_values, &fp_values );
Radeon_ProgramFPRegisters( ai, crtc, fp_info, &fp_values );
fp_info *fp_port, crtc_regs *crtc_values, fp_regs *values )
fp_info *fp_port, fp_regs *values )
fp_info *flatpanel, display_mode *mode, bool use_rmx, fp_regs *values )
fp_info panelInfoSwapEntity;
Radeon_FindFPTiming_DetailedMonitorDesc(const edid1_info *edid, fp_info *fp,
Radeon_FindFPTiming_StandardTiming(const edid1_info *edid, fp_info *fp,
fp_info *fp = &ai->si->flatpanels[port];
void Radeon_CalcRMXRegisters( fp_info *flatpanel, display_mode *mode, bool use_rmx, fp_regs *values );
fp_info *fp_port, crtc_regs *crtc_values, fp_regs *values );
fp_info *fp_port, fp_regs *values );
di->fp_info.panel_xres = RADEON_BIOS16( tmp + 6 );
di->fp_info.panel_yres = RADEON_BIOS16( tmp + 10 );
di->fp_info.dot_clock = RADEON_BIOS16( tmp + 4 ) * 10;
di->fp_info.h_blank = RADEON_BIOS16( tmp + 8 );
di->fp_info.h_over_plus = RADEON_BIOS16( tmp + 14 );
di->fp_info.h_sync_width = RADEON_BIOS16( tmp + 16 );
di->fp_info.v_blank = RADEON_BIOS16( tmp + 12 );
di->fp_info.v_over_plus = RADEON_BIOS16( tmp + 18 );
di->fp_info.h_sync_width = RADEON_BIOS16( tmp + 20 );
di->fp_info.panel_pwr_delay = RADEON_BIOS16( tmp + 40 );
di->fp_info.panel_xres, di->fp_info.panel_yres, di->fp_info.dot_clock,
di->fp_info.h_blank, di->fp_info.h_over_plus, di->fp_info.h_sync_width,
di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.h_sync_width,
di->fp_info.panel_pwr_delay );
di->fp_info.panel_pwr_delay = 200;
di->fp_info.panel_pwr_delay = 200;
di->fp_info.panel_xres = fpi.panel_xres;
di->fp_info.panel_yres = fpi.panel_yres;
di->fp_info.panel_xres, di->fp_info.panel_yres);
di->fp_info.panel_pwr_delay = fpi.panel_pwr_delay;
if( di->fp_info.panel_pwr_delay > 2000 || di->fp_info.panel_pwr_delay < 0 )
di->fp_info.panel_pwr_delay = 2000;
di->fp_info.ref_div = fpi.ref_div;
di->fp_info.post_div = fpi.post_div;
di->fp_info.feedback_div = fpi.feedback_div;
di->fp_info.fixed_dividers =
di->fp_info.ref_div != 0 && di->fp_info.feedback_div > 3;
if( fpi_timing.panel_xres != di->fp_info.panel_xres ||
fpi_timing.panel_yres != di->fp_info.panel_yres )
di->fp_info.h_blank = (fpi_timing.h_total - fpi_timing.h_display) * 8;
di->fp_info.h_over_plus = ((fpi_timing.h_sync_start & 0xfff) - fpi_timing.h_display - 1) * 8;
di->fp_info.h_sync_width = fpi_timing.h_sync_width * 8;
di->fp_info.v_blank = fpi_timing.v_total - fpi_timing.v_display;
di->fp_info.v_over_plus = (fpi_timing.v_sync & 0x7ff) - fpi_timing.v_display;
di->fp_info.v_sync_width = (fpi_timing.v_sync & 0xf800) >> 11;
di->fp_info.dot_clock = fpi_timing.dot_clock * 10;
di->fp_info.panel_yres =
di->fp_info.panel_xres =
di->fp_info.panel_xres, di->fp_info.panel_yres);
di->fp_info.h_blank = (a - b) * 8;
di->fp_info.h_over_plus =
di->fp_info.h_over_plus *= 8;
di->fp_info.h_sync_width =
di->fp_info.h_sync_width *= 8;
di->fp_info.v_blank = a - b;
di->fp_info.v_over_plus = (r & RADEON_FP_V_SYNC_STRT_MASK) - b;
di->fp_info.v_sync_width = ((r & RADEON_FP_V_SYNC_WID_MASK)
di->fp_info.h_blank = (a - b) * 8;
di->fp_info.h_over_plus =
di->fp_info.h_over_plus *= 8;
di->fp_info.h_sync_width =
di->fp_info.h_sync_width *= 8;
di->fp_info.v_blank = a - b;
di->fp_info.v_over_plus = (r & RADEON_CRTC_V_SYNC_STRT) - b;
di->fp_info.v_sync_width = ((r & RADEON_CRTC_V_SYNC_WID)
memset( &di->fp_info, 0, sizeof( di->fp_info ));
if( di->fp_info.panel_xres == 0 || di->fp_info.panel_yres == 0)
if( di->fp_info.h_blank == 0 || di->fp_info.v_blank == 0)
di->fp_info.panel_xres, di->fp_info.h_blank, di->fp_info.h_over_plus, di->fp_info.h_sync_width );
di->fp_info.panel_yres, di->fp_info.v_blank, di->fp_info.v_over_plus, di->fp_info.v_sync_width );
SHOW_INFO( 2, "pixel_clock=%d", di->fp_info.dot_clock );
si->flatpanels[0] = di->fp_info;
fp_info fp_info;
struct printf_info fp_info;
fp_info = *info;
fp_info.spec = 'f';
fp_info.prec = info->prec < 0 ? 3 : info->prec;
fp_info.wide = wide;
if (fp_info.left && fp_info.pad == L' ')
fp_info.width = 0;
done = __printf_fp (fp, &fp_info, &ptr);
fp_info.width = info->width - 1;
done = __printf_fp (fp, &fp_info, &ptr);