fPipeIndex
uint32 targetRegister = FDI_TX_CTL(fPipeIndex);
fPipeIndex(pipeIndex)
uint32 targetRegister = FDI_RX_CTL(fPipeIndex);
uint32 targetRegister = FDI_RX_CTL(fPipeIndex);
return (read32(FDI_RX_CTL(fPipeIndex)) & FDI_RX_PLL_ENABLED) != 0;
uint32 targetRegister = FDI_RX_CTL(fPipeIndex);
uint32 targetRegister = FDI_RX_CTL(fPipeIndex);
uint32 targetRegister = FDI_RX_CTL(fPipeIndex);
uint32 txControl = FDI_TX_CTL(fPipeIndex);
uint32 rxControl = FDI_RX_CTL(fPipeIndex);
TRACE("%s: FDI Link %s:\n", __func__, (fPipeIndex == INTEL_PIPE_A) ? "A" : "B");
uint32 txControl = FDI_TX_CTL(fPipeIndex);
uint32 rxControl = FDI_RX_CTL(fPipeIndex);
write32(FDI_RX_TUSIZE1(fPipeIndex), FDI_RX_TRANS_UNIT_MASK);
write32(FDI_RX_TUSIZE2(fPipeIndex), FDI_RX_TRANS_UNIT_MASK);
uint32 txControl = FDI_TX_CTL(fPipeIndex);
uint32 rxControl = FDI_RX_CTL(fPipeIndex);
uint32 txControl = FDI_TX_CTL(fPipeIndex);
uint32 rxControl = FDI_RX_CTL(fPipeIndex);
uint32 tmp = read32(FDI_RX_IMR(fPipeIndex));
write32(FDI_RX_IMR(fPipeIndex), tmp);
if (fPipeIndex == INTEL_PIPE_B) {
uint32 iirControl = FDI_RX_IIR(fPipeIndex);
fPipeIndex(pipeIndex)
uint32 txControl = FDI_TX_CTL(fPipeIndex);
uint32 rxControl = FDI_RX_CTL(fPipeIndex);
uint32 imrControl = FDI_RX_IMR(fPipeIndex);
write32(FDI_RX_MISC(fPipeIndex),
uint32 iirControl = FDI_RX_IIR(fPipeIndex);
uint32 targetRegister = FDI_TX_CTL(fPipeIndex);
uint32 txControl = FDI_TX_CTL(fPipeIndex);
uint32 rxControl = FDI_RX_CTL(fPipeIndex);
write32(FDI_RX_MISC(fPipeIndex), FDI_RX_TP1_TO_TP2_48 | FDI_RX_FDI_DELAY_90);
uint32 targetRegister = FDI_TX_CTL(fPipeIndex);
return (read32(FDI_TX_CTL(fPipeIndex)) & FDI_TX_PLL_ENABLED) != 0;
uint32 targetRegister = FDI_TX_CTL(fPipeIndex);
{ return fPipeIndex; };
pipe_index fPipeIndex;
{ return fPipeIndex; };
pipe_index fPipeIndex;
pipe_index fPipeIndex;
if (fPipeIndex == INTEL_PIPE_B) {
if (fPipeIndex == INTEL_PIPE_A) {
} else if (fPipeIndex == INTEL_PIPE_B) {
fPipeIndex(pipeIndex),
{ return fPipeIndex; }
pipe_index fPipeIndex;