clock
extern clock_t clock(void);
uint32 clock; /* WORDCLOCK or SUPERCLOCK, typically */
typedef status_t (*i2c_set_signals)(void *cookie, int clock, int data);
typedef status_t (*i2c_get_signals)(void *cookie, int *clock, int *data);
uint32 clock;
ArchUART8250Omap(addr_t base, int64 clock);
DebugUART8250* arch_get_uart_8250_omap(addr_t base, int64 clock);
ArchUARTPL011(addr_t base, int64 clock);
ArchUARTPL011 *arch_get_uart_pl011(addr_t base, int64 clock);
ArchUARTlinflex(addr_t base, int64 clock);
ArchUARTlinflex *arch_get_uart_linflex(addr_t base, int64 clock);
ArchUARTSamsung(addr_t base, int64 clock);
ArchUARTSamsung *arch_get_uart_samsung(addr_t base, int64 clock);
DebugUART(addr_t base, int64 clock)
fClock(clock),
DebugUART8250(addr_t base, int64 clock);
DebugUART8250* arch_get_uart_8250(addr_t base, int64 clock);
ArchUARTSifive* arch_get_uart_sifive(addr_t base, int64 clock);
ArchUARTSifive(addr_t base, int64 clock);
int64 clock;
Port::_SetI2CSignals(void* cookie, int clock, int data)
if (clock != 0)
static status_t _SetI2CSignals(void* cookie, int clock,
skl_ddi_calculate_wrpll(int clock /* in Hz */,
uint64 afe_clock = (uint64) clock * 5; /* AFE Clock is 5x Pixel clock */
TRACE("%s: No valid divider found for %dHz\n", __func__, clock);
static unsigned hsw_wrpll_get_budget_for_freq(int clock)
switch (clock) {
hsw_ddi_calculate_wrpll(int clock /* in Hz */,
freq2k = clock / 100;
budget = hsw_wrpll_get_budget_for_freq(clock);
void hsw_ddi_calculate_wrpll(int clock /* in Hz */,
bool skl_ddi_calculate_wrpll(int clock /* in Hz */,
LOG(8,("I2C: Timeout on set lines - clock:%d data:%d actual:%x\n",clock,data,DXIR(GENIODATA)));
int clock;
clock = (data&I2C_CLOCK) ? 1 : 0;
}while (!clock); /*wait for high clock*/
static int i2c_set_lines(int clock,int data)
(clock ? 0 : I2C_CLOCK)|
(clock ? I2C_CLOCK : 0);
gpio_set_i2c_bit(void* cookie, int clock, int data)
scl |= clock ? 0 : info->i2c.sclEnMask;
pll_set_external(uint32 clock)
TRACE("%s: set external pll clock to %" B_PRIu32 "\n", __func__, clock);
if (clock == 0)
args.v5.usPixelClock = B_HOST_TO_LENDIAN_INT16(clock / 10);
= B_HOST_TO_LENDIAN_INT32(clock / 10);
pll_set_dce(uint32 clock, uint8 clockType, uint8 clockSource)
TRACE("%s: set external pll clock to %" B_PRIu32 "\n", __func__, clock);
if (clock == 0)
= B_HOST_TO_LENDIAN_INT32(clock / 10);
cpu_to_le16((mode->clock * bpc / 8) / 10);
status_t pll_set_external(uint32 clock);
status_t pll_set_dce(uint32 clock, uint8 clockType, uint8 clockSource);
int clock;
clock = (data&I2C_CLOCK) ? 1 : 0;
}while (!clock); /*wait for high clock*/
int i2c_set_lines(int clock, int data);
int i2c_set_lines(int clock,int data)
(clock ? 0 : I2C_CLOCK)|
(clock ? I2C_CLOCK : 0);
int clock;
clock = (data&I2C_CLOCK) ? 1 : 0;
}while (!clock); /*wait for high clock*/
int i2c_set_lines(int clock, int data);
int i2c_set_lines(int clock,int data)
(clock ? 0 : I2C_CLOCK)|
(clock ? I2C_CLOCK : 0);
dev->clock = 48000; /* default clock on non-broken motherboards */
value = (uint32)((rate * 48000ULL) / dev->clock); /* need 64 bit calculation for rates 96000 or higher */
dev->clock, rate, value));
*rate = (uint32)((value * (uint64)dev->clock) / 48000); /* need 64 bit calculation to avoid overflow*/
ac97_set_clock(ac97_dev *dev, uint32 clock)
LOG(("ac97_set_clock: clock = %" B_PRIu32 "\n", clock));
dev->clock = clock;
value = (uint32)((rate * 48000ULL) / dev->clock); /* need 64 bit calculation for rates 96000 or higher */
dev->clock, rate, value));
*rate = (uint32)((value * (uint64)dev->clock) / 48000); /* need 64 bit calculation to avoid overflow*/
uint32 clock;
void ac97_set_clock(ac97_dev *dev, uint32 clock);
ice->CommLines.clock = DELTA66_CLK;
ice->CommLines.clock = AP2496_CLK;
ice->CommLines.clock = DELTA1010LT_CLK;
ice->CommLines.clock = VX442_CLK;
uint8 clock; //an index
uint8 clock;
gpio_data &= ~(ice->CommLines.clock | ice->CommLines.data_out);
gpio_data |= ice->CommLines.clock;
gpio_data &= ~(ice->CommLines.clock);
gpio_data |= ice->CommLines.clock;
value = card->settings.clock;
card->settings.clock = value;
time_t clock = 0;
for (clock = 0;
clock + get_month_length(month, year+1970) < time;
clock += get_month_length(month, year+1970))
int day = time - clock;
radeon_video_clock & clock,
clock = C_RADEON_NO_VIDEO_CLOCK;
clock = C_RADEON_VIDEO_CLOCK_28_63636_MHZ;
clock = C_RADEON_VIDEO_CLOCK_29_49892_MHZ;
clock = C_RADEON_VIDEO_CLOCK_27_00000_MHZ;
clock = C_RADEON_VIDEO_CLOCK_14_31818_MHZ;
clock = C_RADEON_NO_VIDEO_CLOCK;
radeon_video_clock & clock,
void CTheater100::SetClock(theater_standard standard, radeon_video_clock clock)
if (clock == C_RADEON_VIDEO_CLOCK_29_49892_MHZ) {
if (clock == C_RADEON_VIDEO_CLOCK_29_49892_MHZ) {
if (clock == C_RADEON_VIDEO_CLOCK_29_49892_MHZ) {
if (clock == C_RADEON_VIDEO_CLOCK_29_49892_MHZ) {
if (clock == C_RADEON_VIDEO_CLOCK_29_49892_MHZ) {
void SetClock(theater_standard standard, radeon_video_clock clock);
void SetClock(theater_standard standard, radeon_video_clock clock){;};
radeon_video_clock clock;
fPort.Radeon().GetMMParameters(tuner, video, clock, dummy, dummy, dummy);
clock_settings clock;
clock.showSeconds = false;
clock.showDayOfWeek = false;
clock.showTimeZone = false;
clock.showSeconds = prefs.GetBool("showSeconds", false);
clock.showDayOfWeek = prefs.GetBool("showDayOfWeek", false);
clock.showTimeZone = prefs.GetBool("showTimeZone", false);
fClockSettings = clock;
clock_settings* clock = ((TBarApp*)be_app)->ClockSettings();
fTime->SetShowSeconds(clock->showSeconds);
fTime->SetShowDayOfWeek(clock->showDayOfWeek);
fTime->SetShowTimeZone(clock->showTimeZone);
start = clock();
while ((clock() - start) < CLOCKS_PER_SEC / 4)
start = clock();
end = clock();
start = clock();
while ((clock() - start) < CLOCKS_PER_SEC / 4)
start = clock();
end = clock();
start = clock();
while ((clock() - start) < CLOCKS_PER_SEC / 4)
start = clock();
end = clock();
uart.clock != 0 ? uart.clock : 0x16e3600);
uart.clock = spcr->clock;
uart.regs.start, uart.irq, uart.clock);
uart.clock = 0;
uart.clock = dtb_get_clock_frequency(fdt, node);
uart.clock);
get_uart(addr_t base, int64 clock) {
return new(buffer) T(base, clock);
dprintf(" clock: %" B_PRId64 "\n", uart.clock);
DebugUART* (*uart_driver_init)(addr_t base, int64 clock);
sUart.clock = (prop == NULL) ? 0 : fdt32_to_cpu(*(uint32*)prop);
args->arch_args.uart.clock);
args->arch_args.uart.clock);
args->arch_args.uart.clock);
ArchUART8250Omap::ArchUART8250Omap(addr_t base, int64 clock)
DebugUART8250(base, clock)
arch_get_uart_8250_omap(addr_t base, int64 clock)
ArchUART8250Omap* uart = new(buffer) ArchUART8250Omap(base, clock);
ArchUARTPL011::ArchUARTPL011(addr_t base, int64 clock)
DebugUART(base, clock)
arch_get_uart_pl011(addr_t base, int64 clock)
ArchUARTPL011 *uart = new(buffer) ArchUARTPL011(base, clock);
args->arch_args.uart.clock);
args->arch_args.uart.clock);
args->arch_args.uart.clock);
args->arch_args.uart.clock);
ArchUARTlinflex::ArchUARTlinflex(addr_t base, int64 clock)
arch_get_uart_linflex(addr_t base, int64 clock)
ArchUARTlinflex *uart = new(buffer) ArchUARTlinflex(base, clock);
DebugUART(base, clock)
arch_get_uart_samsung(addr_t base, int64 clock)
ArchUARTSamsung* uart = new(buffer) ArchUARTSamsung(base, clock);
ArchUARTSamsung::ArchUARTSamsung(addr_t base, int64 clock)
DebugUART(base, clock)
arch_get_uart_8250(addr_t base, int64 clock)
DebugUART8250* uart = new(buffer) DebugUART8250(base, clock);
DebugUART8250::DebugUART8250(addr_t base, int64 clock)
DebugUART(base, clock)
args->arch_args.uart.clock);
args->arch_args.uart.clock);
ArchUARTSifive::ArchUARTSifive(addr_t base, int64 clock)
arch_get_uart_sifive(addr_t base, int64 clock)
ArchUARTSifive* uart = new(buffer) ArchUARTSifive(base, clock);
DebugUART(base, clock)
int64 clock = Clock();
if (clock < 0)
uint64 quotient = (clock + baud - 1) / baud;