auich_reg_write_8
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, 0);
auich_reg_write_8(&stream->card->config,
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_LVI, (civ + 2) % AUICH_DMALIST_MAX);
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, CR_RPBM | CR_LVBIE | CR_FEIE | CR_IOCE);
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR,
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, 0);
auich_reg_write_8(&stream->card->config, stream->base + AUICH_REG_X_CR, CR_RR);
auich_reg_write_8(&card->config, stream->base + AUICH_REG_X_LVI,
void auich_reg_write_8(device_config *config, uint8 regno, uint8 value);