auich_reg_read_8
if (0 == auich_reg_read_8(&stream->card->config,
uint8 index = auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CIV);
civ = auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CIV);
auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_LVI);
auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR);
auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR) & ~CR_RPBM);
if (0 == auich_reg_read_8(&stream->card->config, stream->base + AUICH_REG_X_CR)) {
LOG(("PI AUICH_REG_X_CIV = %#x\n", auich_reg_read_8(config, AUICH_REG_X_CIV + AUICH_REG_PI_BASE)));
LOG(("PI AUICH_REG_X_LVI = %#x\n", auich_reg_read_8(config, AUICH_REG_X_LVI + AUICH_REG_PI_BASE)));
LOG(("PI AUICH_REG_X_PIV = %#x\n", auich_reg_read_8(config, AUICH_REG_X_PIV + AUICH_REG_PI_BASE)));
LOG(("PI AUICH_REG_X_CR = %#x\n", auich_reg_read_8(config, AUICH_REG_X_CR + AUICH_REG_PI_BASE)));
LOG(("PO AUICH_REG_X_CIV = %#x\n", auich_reg_read_8(config, AUICH_REG_X_CIV + AUICH_REG_PO_BASE)));
LOG(("PO AUICH_REG_X_LVI = %#x\n", auich_reg_read_8(config, AUICH_REG_X_LVI + AUICH_REG_PO_BASE)));
LOG(("PO AUICH_REG_X_PIV = %#x\n", auich_reg_read_8(config, AUICH_REG_X_PIV + AUICH_REG_PO_BASE)));
LOG(("PO AUICH_REG_X_CR = %#x\n", auich_reg_read_8(config, AUICH_REG_X_CR + AUICH_REG_PO_BASE)));
if ((auich_reg_read_8(config, AUICH_REG_ACC_SEMA) & 0x01) == 0)
uint8 auich_reg_read_8(device_config *config, uint8 regno);