aue_csr_write_1
aue_csr_write_1(sc, AUE_CTL0, 0);
aue_csr_write_1(sc, AUE_CTL1, 0);
static void aue_csr_write_1(struct aue_softc *, uint16_t, uint8_t);
aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) | (x))
aue_csr_write_1(sc, reg, aue_csr_read_1(sc, reg) & ~(x))
aue_csr_write_1(sc, AUE_EE_REG, addr);
aue_csr_write_1(sc, AUE_EE_CTL, AUE_EECTL_READ);
aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_READ);
aue_csr_write_1(sc, AUE_PHY_ADDR, phy);
aue_csr_write_1(sc, AUE_PHY_CTL, reg | AUE_PHYCTL_WRITE);
aue_csr_write_1(sc, AUE_MAR0 + i, hashtbl[i]);
aue_csr_write_1(sc, AUE_REG_1D, 0);
aue_csr_write_1(sc, AUE_REG_7B, 2);
aue_csr_write_1(sc, AUE_REG_81, 6);
aue_csr_write_1(sc, AUE_REG_81, 2);
aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1|AUE_GPIO_OUT0);
aue_csr_write_1(sc, AUE_GPIO0, AUE_GPIO_SEL0|AUE_GPIO_SEL1);
aue_csr_write_1(sc, AUE_GPIO0,
aue_csr_write_1(sc, AUE_PAR0 + i, if_getlladdr(ifp)[i]);
aue_csr_write_1(sc, AUE_CTL0, AUE_CTL0_RXSTAT_APPEND | AUE_CTL0_RX_ENB);