age_dev
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev, "4GB boundary crossed, "
bus_get_dma_tag(sc->age_dev), /* parent */
device_printf(sc->age_dev,
device_printf(sc->age_dev, "could not create Tx DMA tag.\n");
device_printf(sc->age_dev, "could not create Rx DMA tag.\n");
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
if (pci_find_cap(sc->age_dev, PCIY_PMG, &pmc) != 0) {
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
device_printf(sc->age_dev,
pmstat = pci_read_config(sc->age_dev, pmc + PCIR_POWER_STATUS, 2);
pci_write_config(sc->age_dev, pmc + PCIR_POWER_STATUS, pmstat, 2);
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev, "phy read timeout : %d\n", reg);
device_printf(sc->age_dev, "reset timeout(0x%08x)!\n", reg);
device_printf(sc->age_dev, "phy write timeout : %d\n", reg);
device_printf(sc->age_dev, "no memory for Rx buffers.\n");
device_printf(sc->age_dev, "interrupt moderation is %d us.\n",
device_printf(sc->age_dev,
device_printf(sc->age_dev, "stopping TxMAC timeout!\n");
device_printf(sc->age_dev, "stopping RxMAC timeout!\n");
struct age_dev *sp;
printf("%s statistics:\n", device_get_nameunit(sc->age_dev));
if (pci_find_cap(sc->age_dev, PCIY_VPD, &vpdc) == 0) {
device_printf(sc->age_dev,
device_printf(sc->age_dev,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR, BMCR_RESET);
age_miibus_writereg(sc->age_dev, sc->age_phyaddr, ATPHY_CDTC,
reg = age_miibus_readreg(sc->age_dev, sc->age_phyaddr,
reg = age_miibus_readreg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr, MII_BMCR,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
reg = age_miibus_readreg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
age_miibus_writereg(sc->age_dev, sc->age_phyaddr,
sc->age_dev = dev;
device_get_nameunit(sc->age_dev));
SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->age_dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(sc->age_dev)), OID_AUTO,
SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->age_dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(sc->age_dev)), OID_AUTO,
error = resource_int_value(device_get_name(sc->age_dev),
device_get_unit(sc->age_dev), "int_mod", &sc->age_int_mod);
device_printf(sc->age_dev,
SYSCTL_ADD_PROC(device_get_sysctl_ctx(sc->age_dev),
SYSCTL_CHILDREN(device_get_sysctl_tree(sc->age_dev)), OID_AUTO,
error = resource_int_value(device_get_name(sc->age_dev),
device_get_unit(sc->age_dev), "process_limit",
device_printf(sc->age_dev,
bus_get_dma_tag(sc->age_dev), /* parent */
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_printf(sc->age_dev,
device_t age_dev;