__BIT
((__BIT(MAX((__m), (__n)) + 1) - 1) ^ (__BIT(MIN((__m), (__n))) - 1))
#define BWI_RFR_BBP_ATTEN_CALIB_BIT __BIT(0)
#define BWI_CAP_CLKMODE __BIT(18)
#define BWI_CLOCK_CTRL_SLOW __BIT(11)
#define BWI_CLOCK_CTRL_IGNPLL __BIT(12)
#define BWI_CLOCK_CTRL_NODYN __BIT(13)
#define BWI_BUS_CONFIG_PREFETCH __BIT(2)
#define BWI_BUS_CONFIG_BURST __BIT(3)
#define BWI_BUS_CONFIG_MRM __BIT(5)
#define BWI_MAC_STATUS_ENABLE __BIT(0)
#define BWI_MAC_STATUS_UCODE_START __BIT(1)
#define BWI_MAC_STATUS_UCODE_JUMP0 __BIT(2)
#define BWI_MAC_STATUS_IHREN __BIT(10)
#define BWI_MAC_STATUS_BSWAP __BIT(16)
#define BWI_MAC_STATUS_INFRA __BIT(17)
#define BWI_MAC_STATUS_OPMODE_HOSTAP __BIT(18)
#define BWI_MAC_STATUS_RFLOCK __BIT(19)
#define BWI_MAC_STATUS_PASS_BCN __BIT(20)
#define BWI_MAC_STATUS_PASS_BADPLCP __BIT(21)
#define BWI_MAC_STATUS_PASS_CTL __BIT(22)
#define BWI_MAC_STATUS_PASS_BADFCS __BIT(23)
#define BWI_MAC_STATUS_PROMISC __BIT(24)
#define BWI_MAC_STATUS_HW_PS __BIT(25)
#define BWI_MAC_STATUS_WAKEUP __BIT(26)
#define BWI_MAC_STATUS_PHYLNK __BIT(31)
#define BWI_TXSTATUS0_VALID __BIT(0)
#define BWI_TXSTATUS0_ACKED __BIT(1)
#define BWI_TXSTATUS0_AMPDU __BIT(5)
#define BWI_TXSTATUS0_PENDING __BIT(6)
#define BWI_TXSTATUS0_PM __BIT(7)
#define BWI_TXRX32_CTRL_ENABLE __BIT(0)
#define BWI_PCIM_GPIO_OUT_CLKSRC __BIT(4)
#define BWI_PCIM_GPIO_PWR_ON __BIT(6)
#define BWI_PCIM_GPIO_PLL_PWR_OFF __BIT(7)
#define BWI_CARD_F_BT_COEXIST __BIT(0) /* Bluetooth coexist */
#define BWI_CARD_F_PA_GPIO9 __BIT(1) /* GPIO 9 controls PA */
#define BWI_CARD_F_SW_NRSSI __BIT(3)
#define BWI_CARD_F_NO_SLOWCLK __BIT(5) /* no slow clock */
#define BWI_CARD_F_EXT_LNA __BIT(12) /* external LNA */
#define BWI_CARD_F_ALT_IQ __BIT(15) /* alternate I/Q */
#define BWI_LED_ACT_LOW __BIT(7)
#define BWI_INTR_READY __BIT(0)
#define BWI_INTR_BEACON __BIT(1)
#define BWI_INTR_TBTT __BIT(2)
#define BWI_INTR_EO_ATIM __BIT(5) /* End of ATIM */
#define BWI_INTR_PMQ __BIT(6) /* XXX?? */
#define BWI_INTR_MAC_TXERR __BIT(9)
#define BWI_INTR_PHY_TXERR __BIT(11)
#define BWI_INTR_TIMER1 __BIT(14)
#define BWI_INTR_RX_DONE __BIT(15)
#define BWI_INTR_TX_FIFO __BIT(16) /* XXX?? */
#define BWI_INTR_NOISE __BIT(18)
#define BWI_INTR_RF_DISABLED __BIT(28)
#define BWI_INTR_TX_DONE __BIT(29)
#define BWI_IMSTATE_INBAND_ERR __BIT(17)
#define BWI_TXRX_INTR_ERROR (__BIT(15) | __BIT(14) | __BITS(12, 10))
#define BWI_TXRX_INTR_RX __BIT(16)
#define BWI_IMSTATE_TIMEOUT __BIT(18)
#define BWI_STATE_LO_RESET __BIT(0)
#define BWI_STATE_LO_DISABLE1 __BIT(1)
#define BWI_STATE_LO_DISABLE2 __BIT(2)
#define BWI_STATE_LO_CLOCK __BIT(16)
#define BWI_STATE_LO_GATED_CLOCK __BIT(17)
#define BWI_STATE_LO_FLAG_PHYCLKEN __BIT(0)
#define BWI_STATE_LO_FLAG_PHYRST __BIT(1)
#define BWI_STATE_LO_FLAG_PHYLNK __BIT(11)
#define BWI_STATE_HI_SERROR __BIT(0)
#define BWI_STATE_HI_BUSY __BIT(2)
#define BWI_DESC32_C_EOR __BIT(28)
#define BWI_DESC32_C_INTR __BIT(29)
#define BWI_DESC32_C_FRAME_END __BIT(30)
#define BWI_DESC32_C_FRAME_START __BIT(31)
#define BWI_RXH_F1_BCM2053_RSSI __BIT(14)
#define BWI_RXH_F1_SHPREAMBLE __BIT(7)
#define BWI_RXH_F1_OFDM __BIT(0)
#define BWI_RXH_F2_TYPE2FRAME __BIT(2)
#define BWI_RXH_F3_BCM2050_RSSI __BIT(10)
#define BWI_TXH_PHY_C_OFDM __BIT(0)
#define BWI_TXH_PHY_C_SHPREAMBLE __BIT(4)
#define BWI_TXH_MAC_C_ACK __BIT(0)
#define BWI_TXH_MAC_C_FIRST_FRAG __BIT(3)
#define BWI_TXH_MAC_C_HWSEQ __BIT(4)
#define BWI_TXH_MAC_C_FB_OFDM __BIT(8)
#define BWI_TXS_F_ACKED __BIT(0)
#define BWI_TXS_F_PENDING __BIT(5)
#define BWI_FW_IV_IS_32BIT __BIT(15)
((__BIT(max_c((__m), (__n)) + 1) - 1) ^ (__BIT(min_c((__m), (__n))) - 1))
#define NVMM_CAP_ARCH_VCPU_CONF_CPUID __BIT(0)
#define NVMM_CAP_ARCH_VCPU_CONF_TPR __BIT(1)
#define CPUID_0_01_ECX_SSE3 __BIT(0)
#define CPUID_0_01_ECX_PCLMULQDQ __BIT(1)
#define CPUID_0_01_ECX_DTES64 __BIT(2)
#define CPUID_0_01_ECX_MONITOR __BIT(3)
#define CPUID_0_01_ECX_DS_CPL __BIT(4)
#define CPUID_0_01_ECX_VMX __BIT(5)
#define CPUID_0_01_ECX_SMX __BIT(6)
#define CPUID_0_01_ECX_EIST __BIT(7)
#define CPUID_0_01_ECX_TM2 __BIT(8)
#define CPUID_0_01_ECX_SSSE3 __BIT(9)
#define CPUID_0_01_ECX_CNXTID __BIT(10)
#define CPUID_0_01_ECX_SDBG __BIT(11)
#define CPUID_0_01_ECX_FMA __BIT(12)
#define CPUID_0_01_ECX_CX16 __BIT(13)
#define CPUID_0_01_ECX_XTPR __BIT(14)
#define CPUID_0_01_ECX_PDCM __BIT(15)
#define CPUID_0_01_ECX_PCID __BIT(17)
#define CPUID_0_01_ECX_DCA __BIT(18)
#define CPUID_0_01_ECX_SSE41 __BIT(19)
#define CPUID_0_01_ECX_SSE42 __BIT(20)
#define CPUID_0_01_ECX_X2APIC __BIT(21)
#define CPUID_0_01_ECX_MOVBE __BIT(22)
#define CPUID_0_01_ECX_POPCNT __BIT(23)
#define CPUID_0_01_ECX_TSC_DEADLINE __BIT(24)
#define CPUID_0_01_ECX_AESNI __BIT(25)
#define CPUID_0_01_ECX_XSAVE __BIT(26)
#define CPUID_0_01_ECX_OSXSAVE __BIT(27)
#define CPUID_0_01_ECX_AVX __BIT(28)
#define CPUID_0_01_ECX_F16C __BIT(29)
#define CPUID_0_01_ECX_RDRAND __BIT(30)
#define CPUID_0_01_ECX_RAZ __BIT(31)
#define CPUID_0_01_EDX_FPU __BIT(0)
#define CPUID_0_01_EDX_VME __BIT(1)
#define CPUID_0_01_EDX_DE __BIT(2)
#define CPUID_0_01_EDX_PSE __BIT(3)
#define CPUID_0_01_EDX_TSC __BIT(4)
#define CPUID_0_01_EDX_MSR __BIT(5)
#define CPUID_0_01_EDX_PAE __BIT(6)
#define CPUID_0_01_EDX_MCE __BIT(7)
#define CPUID_0_01_EDX_CX8 __BIT(8)
#define CPUID_0_01_EDX_APIC __BIT(9)
#define CPUID_0_01_EDX_SEP __BIT(11)
#define CPUID_0_01_EDX_MTRR __BIT(12)
#define CPUID_0_01_EDX_PGE __BIT(13)
#define CPUID_0_01_EDX_MCA __BIT(14)
#define CPUID_0_01_EDX_CMOV __BIT(15)
#define CPUID_0_01_EDX_PAT __BIT(16)
#define CPUID_0_01_EDX_PSE36 __BIT(17)
#define CPUID_0_01_EDX_PSN __BIT(18)
#define CPUID_0_01_EDX_CLFSH __BIT(19)
#define CPUID_0_01_EDX_DS __BIT(21)
#define CPUID_0_01_EDX_ACPI __BIT(22)
#define CPUID_0_01_EDX_MMX __BIT(23)
#define CPUID_0_01_EDX_FXSR __BIT(24)
#define CPUID_0_01_EDX_SSE __BIT(25)
#define CPUID_0_01_EDX_SSE2 __BIT(26)
#define CPUID_0_01_EDX_SS __BIT(27)
#define CPUID_0_01_EDX_HTT __BIT(28)
#define CPUID_0_01_EDX_TM __BIT(29)
#define CPUID_0_01_EDX_PBE __BIT(31)
#define CPUID_0_04_EAX_SELFINITCL __BIT(8)
#define CPUID_0_04_EAX_FULLASSOC __BIT(9)
#define CPUID_0_07_EBX_FSGSBASE __BIT(0)
#define CPUID_0_07_EBX_TSC_ADJUST __BIT(1)
#define CPUID_0_07_EBX_SGX __BIT(2)
#define CPUID_0_07_EBX_BMI1 __BIT(3)
#define CPUID_0_07_EBX_HLE __BIT(4)
#define CPUID_0_07_EBX_AVX2 __BIT(5)
#define CPUID_0_07_EBX_FDPEXONLY __BIT(6)
#define CPUID_0_07_EBX_SMEP __BIT(7)
#define CPUID_0_07_EBX_BMI2 __BIT(8)
#define CPUID_0_07_EBX_ERMS __BIT(9)
#define CPUID_0_07_EBX_INVPCID __BIT(10)
#define CPUID_0_07_EBX_RTM __BIT(11)
#define CPUID_0_07_EBX_QM __BIT(12)
#define CPUID_0_07_EBX_FPUCSDS __BIT(13)
#define CPUID_0_07_EBX_MPX __BIT(14)
#define CPUID_0_07_EBX_PQE __BIT(15)
#define CPUID_0_07_EBX_AVX512F __BIT(16)
#define CPUID_0_07_EBX_AVX512DQ __BIT(17)
#define CPUID_0_07_EBX_RDSEED __BIT(18)
#define CPUID_0_07_EBX_ADX __BIT(19)
#define CPUID_0_07_EBX_SMAP __BIT(20)
#define CPUID_0_07_EBX_AVX512_IFMA __BIT(21)
#define CPUID_0_07_EBX_CLFLUSHOPT __BIT(23)
#define CPUID_0_07_EBX_CLWB __BIT(24)
#define CPUID_0_07_EBX_PT __BIT(25)
#define CPUID_0_07_EBX_AVX512PF __BIT(26)
#define CPUID_0_07_EBX_AVX512ER __BIT(27)
#define CPUID_0_07_EBX_AVX512CD __BIT(28)
#define CPUID_0_07_EBX_SHA __BIT(29)
#define CPUID_0_07_EBX_AVX512BW __BIT(30)
#define CPUID_0_07_EBX_AVX512VL __BIT(31)
#define CPUID_0_07_ECX_PREFETCHWT1 __BIT(0)
#define CPUID_0_07_ECX_AVX512_VBMI __BIT(1)
#define CPUID_0_07_ECX_UMIP __BIT(2)
#define CPUID_0_07_ECX_PKU __BIT(3)
#define CPUID_0_07_ECX_OSPKE __BIT(4)
#define CPUID_0_07_ECX_WAITPKG __BIT(5)
#define CPUID_0_07_ECX_AVX512_VBMI2 __BIT(6)
#define CPUID_0_07_ECX_CET_SS __BIT(7)
#define CPUID_0_07_ECX_GFNI __BIT(8)
#define CPUID_0_07_ECX_VAES __BIT(9)
#define CPUID_0_07_ECX_VPCLMULQDQ __BIT(10)
#define CPUID_0_07_ECX_AVX512_VNNI __BIT(11)
#define CPUID_0_07_ECX_AVX512_BITALG __BIT(12)
#define CPUID_0_07_ECX_AVX512_VPOPCNTDQ __BIT(14)
#define CPUID_0_07_ECX_LA57 __BIT(16)
#define CPUID_0_07_ECX_RDPID __BIT(22)
#define CPUID_0_07_ECX_KL __BIT(23)
#define CPUID_0_07_ECX_CLDEMOTE __BIT(25)
#define CPUID_0_07_ECX_MOVDIRI __BIT(27)
#define CPUID_0_07_ECX_MOVDIR64B __BIT(28)
#define CPUID_0_07_ECX_SGXLC __BIT(30)
#define CPUID_0_07_ECX_PKS __BIT(31)
#define CPUID_0_07_EDX_AVX512_4VNNIW __BIT(2)
#define CPUID_0_07_EDX_AVX512_4FMAPS __BIT(3)
#define CPUID_0_07_EDX_FSREP_MOV __BIT(4)
#define CPUID_0_07_EDX_AVX512_VP2INTERSECT __BIT(8)
#define CPUID_0_07_EDX_SRBDS_CTRL __BIT(9)
#define CPUID_0_07_EDX_MD_CLEAR __BIT(10)
#define CPUID_0_07_EDX_TSX_FORCE_ABORT __BIT(13)
#define CPUID_0_07_EDX_SERIALIZE __BIT(14)
#define CPUID_0_07_EDX_HYBRID __BIT(15)
#define CPUID_0_07_EDX_TSXLDTRK __BIT(16)
#define CPUID_0_07_EDX_CET_IBT __BIT(20)
#define CPUID_0_07_EDX_IBRS __BIT(26)
#define CPUID_0_07_EDX_STIBP __BIT(27)
#define CPUID_0_07_EDX_L1D_FLUSH __BIT(28)
#define CPUID_0_07_EDX_ARCH_CAP __BIT(29)
#define CPUID_0_07_EDX_CORE_CAP __BIT(30)
#define CPUID_0_07_EDX_SSBD __BIT(31)
#define CPUID_0_0D_ECX1_EAX_XSAVEOPT __BIT(0)
#define CPUID_0_0D_ECX1_EAX_XSAVEC __BIT(1)
#define CPUID_0_0D_ECX1_EAX_XGETBV __BIT(2)
#define CPUID_0_0D_ECX1_EAX_XSAVES __BIT(3)
#define CPUID_8_01_ECX_LAHF __BIT(0)
#define CPUID_8_01_ECX_CMPLEGACY __BIT(1)
#define CPUID_8_01_ECX_SVM __BIT(2)
#define CPUID_8_01_ECX_EAPIC __BIT(3)
#define CPUID_8_01_ECX_ALTMOVCR8 __BIT(4)
#define CPUID_8_01_ECX_ABM __BIT(5)
#define CPUID_8_01_ECX_SSE4A __BIT(6)
#define CPUID_8_01_ECX_MISALIGNSSE __BIT(7)
#define CPUID_8_01_ECX_3DNOWPF __BIT(8)
#define CPUID_8_01_ECX_OSVW __BIT(9)
#define CPUID_8_01_ECX_IBS __BIT(10)
#define CPUID_8_01_ECX_XOP __BIT(11)
#define CPUID_8_01_ECX_SKINIT __BIT(12)
#define CPUID_8_01_ECX_WDT __BIT(13)
#define CPUID_8_01_ECX_LWP __BIT(15)
#define CPUID_8_01_ECX_FMA4 __BIT(16)
#define CPUID_8_01_ECX_TCE __BIT(17)
#define CPUID_8_01_ECX_NODEID __BIT(19)
#define CPUID_8_01_ECX_TBM __BIT(21)
#define CPUID_8_01_ECX_TOPOEXT __BIT(22)
#define CPUID_8_01_ECX_PCEC __BIT(23)
#define CPUID_8_01_ECX_PCENB __BIT(24)
#define CPUID_8_01_ECX_DBE __BIT(26)
#define CPUID_8_01_ECX_PERFTSC __BIT(27)
#define CPUID_8_01_ECX_PERFEXTLLC __BIT(28)
#define CPUID_8_01_ECX_MWAITX __BIT(29)
#define CPUID_8_01_EDX_FPU __BIT(0)
#define CPUID_8_01_EDX_VME __BIT(1)
#define CPUID_8_01_EDX_DE __BIT(2)
#define CPUID_8_01_EDX_PSE __BIT(3)
#define CPUID_8_01_EDX_TSC __BIT(4)
#define CPUID_8_01_EDX_MSR __BIT(5)
#define CPUID_8_01_EDX_PAE __BIT(6)
#define CPUID_8_01_EDX_MCE __BIT(7)
#define CPUID_8_01_EDX_CX8 __BIT(8)
#define CPUID_8_01_EDX_APIC __BIT(9)
#define CPUID_8_01_EDX_SYSCALL __BIT(11)
#define CPUID_8_01_EDX_MTRR __BIT(12)
#define CPUID_8_01_EDX_PGE __BIT(13)
#define CPUID_8_01_EDX_MCA __BIT(14)
#define CPUID_8_01_EDX_CMOV __BIT(15)
#define CPUID_8_01_EDX_PAT __BIT(16)
#define CPUID_8_01_EDX_PSE36 __BIT(17)
#define CPUID_8_01_EDX_XD __BIT(20)
#define CPUID_8_01_EDX_MMXEXT __BIT(22)
#define CPUID_8_01_EDX_MMX __BIT(23)
#define CPUID_8_01_EDX_FXSR __BIT(24)
#define CPUID_8_01_EDX_FFXSR __BIT(25)
#define CPUID_8_01_EDX_PAGE1GB __BIT(26)
#define CPUID_8_01_EDX_RDTSCP __BIT(27)
#define CPUID_8_01_EDX_LM __BIT(29)
#define CPUID_8_01_EDX_3DNOWEXT __BIT(30)
#define CPUID_8_01_EDX_3DNOW __BIT(31)
#define CPUID_8_07_EDX_TS __BIT(0)
#define CPUID_8_07_EDX_FID __BIT(1)
#define CPUID_8_07_EDX_VID __BIT(2)
#define CPUID_8_07_EDX_TTP __BIT(3)
#define CPUID_8_07_EDX_TM __BIT(4)
#define CPUID_8_07_EDX_100MHzSteps __BIT(6)
#define CPUID_8_07_EDX_HwPstate __BIT(7)
#define CPUID_8_07_EDX_TscInvariant __BIT(8)
#define CPUID_8_07_EDX_CPB __BIT(9)
#define CPUID_8_07_EDX_EffFreqRO __BIT(10)
#define CPUID_8_07_EDX_ProcFeedbackIntf __BIT(11)
#define CPUID_8_07_EDX_ProcPowerReport __BIT(12)
#define CPUID_8_08_EBX_CLZERO __BIT(0)
#define CPUID_8_08_EBX_InstRetCntMsr __BIT(1)
#define CPUID_8_08_EBX_RstrFpErrPtrs __BIT(2)
#define CPUID_8_08_EBX_INVLPGB __BIT(3)
#define CPUID_8_08_EBX_RDPRU __BIT(4)
#define CPUID_8_08_EBX_MCOMMIT __BIT(8)
#define CPUID_8_08_EBX_WBNOINVD __BIT(9)
#define CPUID_8_08_EBX_IBPB __BIT(12)
#define CPUID_8_08_EBX_INT_WBINVD __BIT(13)
#define CPUID_8_08_EBX_IBRS __BIT(14)
#define CPUID_8_08_EBX_STIBP __BIT(15)
#define CPUID_8_08_EBX_IBRS_ALWAYSON __BIT(16)
#define CPUID_8_08_EBX_STIBP_ALWAYSON __BIT(17)
#define CPUID_8_08_EBX_PREFER_IBRS __BIT(18)
#define CPUID_8_08_EBX_EferLmsleUnsupp __BIT(20)
#define CPUID_8_08_EBX_INVLPGBnestedPg __BIT(21)
#define CPUID_8_08_EBX_SSBD __BIT(24)
#define CPUID_8_08_EBX_VIRT_SSBD __BIT(25)
#define CPUID_8_08_EBX_SSB_NO __BIT(26)
#define CPUID_8_0A_EDX_NP __BIT(0)
#define CPUID_8_0A_EDX_LbrVirt __BIT(1)
#define CPUID_8_0A_EDX_SVML __BIT(2)
#define CPUID_8_0A_EDX_NRIPS __BIT(3)
#define CPUID_8_0A_EDX_TscRateMsr __BIT(4)
#define CPUID_8_0A_EDX_VmcbClean __BIT(5)
#define CPUID_8_0A_EDX_FlushByASID __BIT(6)
#define CPUID_8_0A_EDX_DecodeAssists __BIT(7)
#define CPUID_8_0A_EDX_PauseFilter __BIT(10)
#define CPUID_8_0A_EDX_PFThreshold __BIT(12)
#define CPUID_8_0A_EDX_AVIC __BIT(13)
#define CPUID_8_0A_EDX_VMSAVEvirt __BIT(15)
#define CPUID_8_0A_EDX_VGIF __BIT(16)
#define CPUID_8_0A_EDX_GMET __BIT(17)
#define CPUID_8_0A_EDX_SSSCheck __BIT(19)
#define CPUID_8_0A_EDX_SpecCtrl __BIT(20)
#define CPUID_8_0A_EDX_TlbiCtl __BIT(24)
#define SVM_EXIT_IO_A64 __BIT(9)
#define SVM_EXIT_IO_A32 __BIT(8)
#define SVM_EXIT_IO_A16 __BIT(7)
#define SVM_EXIT_IO_SZ32 __BIT(6)
#define SVM_EXIT_IO_SZ16 __BIT(5)
#define SVM_EXIT_IO_SZ8 __BIT(4)
#define SVM_EXIT_IO_REP __BIT(3)
#define SVM_EXIT_IO_STR __BIT(2)
#define SVM_EXIT_IO_IN __BIT(0)
#define SVM_MSRBM_READ __BIT(0)
#define SVM_MSRBM_WRITE __BIT(1)
#define SVM_SEG_ATTRIB_S __BIT(4)
#define SVM_SEG_ATTRIB_P __BIT(7)
#define SVM_SEG_ATTRIB_AVL __BIT(8)
#define SVM_SEG_ATTRIB_L __BIT(9)
#define SVM_SEG_ATTRIB_DEF __BIT(10)
#define SVM_SEG_ATTRIB_G __BIT(11)
if (svm_asidmap[oct] & __BIT(bit)) {
svm_asidmap[oct] |= __BIT(bit);
svm_asidmap[oct] &= ~__BIT(bit);
#define VMCB_CTRL_INTERCEPT_RCR(x) __BIT( 0 + x)
#define VMCB_CTRL_INTERCEPT_WCR(x) __BIT(16 + x)
#define VMCB_CTRL_INTERCEPT_RDR(x) __BIT( 0 + x)
#define VMCB_CTRL_INTERCEPT_WDR(x) __BIT(16 + x)
#define VMCB_CTRL_INTERCEPT_VEC(x) __BIT(x)
svm_asidmap[0] |= __BIT(0);
svm_asidmap[i] |= __BIT(j);
#define VMCB_CTRL_INTERCEPT_INTR __BIT(0)
#define VMCB_CTRL_INTERCEPT_NMI __BIT(1)
#define VMCB_CTRL_INTERCEPT_SMI __BIT(2)
#define VMCB_CTRL_INTERCEPT_INIT __BIT(3)
#define VMCB_CTRL_INTERCEPT_VINTR __BIT(4)
#define VMCB_CTRL_INTERCEPT_CR0_SPEC __BIT(5)
#define VMCB_CTRL_INTERCEPT_RIDTR __BIT(6)
#define VMCB_CTRL_INTERCEPT_RGDTR __BIT(7)
#define VMCB_CTRL_INTERCEPT_RLDTR __BIT(8)
#define VMCB_CTRL_INTERCEPT_RTR __BIT(9)
#define VMCB_CTRL_INTERCEPT_WIDTR __BIT(10)
#define VMCB_CTRL_INTERCEPT_WGDTR __BIT(11)
#define VMCB_CTRL_INTERCEPT_WLDTR __BIT(12)
#define VMCB_CTRL_INTERCEPT_WTR __BIT(13)
#define VMCB_CTRL_INTERCEPT_RDTSC __BIT(14)
#define VMCB_CTRL_INTERCEPT_RDPMC __BIT(15)
#define VMCB_CTRL_INTERCEPT_PUSHF __BIT(16)
#define VMCB_CTRL_INTERCEPT_POPF __BIT(17)
#define VMCB_CTRL_INTERCEPT_CPUID __BIT(18)
#define VMCB_CTRL_INTERCEPT_RSM __BIT(19)
#define VMCB_CTRL_INTERCEPT_IRET __BIT(20)
#define VMCB_CTRL_INTERCEPT_INTN __BIT(21)
#define VMCB_CTRL_INTERCEPT_INVD __BIT(22)
#define VMCB_CTRL_INTERCEPT_PAUSE __BIT(23)
#define VMCB_CTRL_INTERCEPT_HLT __BIT(24)
#define VMCB_CTRL_INTERCEPT_INVLPG __BIT(25)
#define VMCB_CTRL_INTERCEPT_INVLPGA __BIT(26)
#define VMCB_CTRL_INTERCEPT_IOIO_PROT __BIT(27)
#define VMCB_CTRL_INTERCEPT_MSR_PROT __BIT(28)
#define VMCB_CTRL_INTERCEPT_TASKSW __BIT(29)
#define VMCB_CTRL_INTERCEPT_FERR_FREEZE __BIT(30)
#define VMCB_CTRL_INTERCEPT_SHUTDOWN __BIT(31)
#define VMCB_CTRL_INTERCEPT_VMRUN __BIT(0)
#define VMCB_CTRL_INTERCEPT_VMMCALL __BIT(1)
#define VMCB_CTRL_INTERCEPT_VMLOAD __BIT(2)
#define VMCB_CTRL_INTERCEPT_VMSAVE __BIT(3)
#define VMCB_CTRL_INTERCEPT_STGI __BIT(4)
#define VMCB_CTRL_INTERCEPT_CLGI __BIT(5)
#define VMCB_CTRL_INTERCEPT_SKINIT __BIT(6)
#define VMCB_CTRL_INTERCEPT_RDTSCP __BIT(7)
#define VMCB_CTRL_INTERCEPT_ICEBP __BIT(8)
#define VMCB_CTRL_INTERCEPT_WBINVD __BIT(9)
#define VMCB_CTRL_INTERCEPT_MONITOR __BIT(10)
#define VMCB_CTRL_INTERCEPT_MWAIT __BIT(11)
#define VMCB_CTRL_INTERCEPT_MWAIT_ARMED __BIT(12)
#define VMCB_CTRL_INTERCEPT_XSETBV __BIT(13)
#define VMCB_CTRL_INTERCEPT_RDPRU __BIT(14)
#define VMCB_CTRL_INTERCEPT_EFER_SPEC __BIT(15)
#define VMCB_CTRL_INTERCEPT_WCR_SPEC(x) __BIT(16 + x)
#define VMCB_CTRL_INTERCEPT_INVLPGB_ALL __BIT(0)
#define VMCB_CTRL_INTERCEPT_INVLPGB_ILL __BIT(1)
#define VMCB_CTRL_INTERCEPT_PCID __BIT(2)
#define VMCB_CTRL_INTERCEPT_MCOMMIT __BIT(3)
#define VMCB_CTRL_INTERCEPT_TLBSYNC __BIT(4)
#define VMCB_CTRL_V_IRQ __BIT(8)
#define VMCB_CTRL_V_VGIF __BIT(9)
#define VMCB_CTRL_V_IGN_TPR __BIT(20)
#define VMCB_CTRL_V_INTR_MASKING __BIT(24)
#define VMCB_CTRL_V_GUEST_VGIF __BIT(25)
#define VMCB_CTRL_V_AVIC_EN __BIT(31)
#define VMCB_CTRL_INTR_SHADOW __BIT(0)
#define VMCB_CTRL_INTR_MASK __BIT(1)
#define VMCB_CTRL_EXITINTINFO_EV __BIT(11)
#define VMCB_CTRL_EXITINTINFO_V __BIT(31)
#define VMCB_CTRL_ENABLE_NP __BIT(0)
#define VMCB_CTRL_ENABLE_SEV __BIT(1)
#define VMCB_CTRL_ENABLE_ES_SEV __BIT(2)
#define VMCB_CTRL_ENABLE_GMET __BIT(3)
#define VMCB_CTRL_ENABLE_SSS __BIT(4)
#define VMCB_CTRL_ENABLE_VTE __BIT(5)
#define VMCB_CTRL_EVENTINJ_EV __BIT(11)
#define VMCB_CTRL_EVENTINJ_V __BIT(31)
#define VMCB_CTRL_ENABLE_LBR __BIT(0)
#define VMCB_CTRL_ENABLE_VVMSAVE __BIT(1)
#define VMCB_CTRL_VMCB_CLEAN_I __BIT(0)
#define VMCB_CTRL_VMCB_CLEAN_IOPM __BIT(1)
#define VMCB_CTRL_VMCB_CLEAN_ASID __BIT(2)
#define VMCB_CTRL_VMCB_CLEAN_TPR __BIT(3)
#define VMCB_CTRL_VMCB_CLEAN_NP __BIT(4)
#define VMCB_CTRL_VMCB_CLEAN_CR __BIT(5)
#define VMCB_CTRL_VMCB_CLEAN_DR __BIT(6)
#define VMCB_CTRL_VMCB_CLEAN_DT __BIT(7)
#define VMCB_CTRL_VMCB_CLEAN_SEG __BIT(8)
#define VMCB_CTRL_VMCB_CLEAN_CR2 __BIT(9)
#define VMCB_CTRL_VMCB_CLEAN_LBR __BIT(10)
#define VMCB_CTRL_VMCB_CLEAN_AVIC __BIT(11)
#define VMCB_CTRL_VMCB_CLEAN_CET __BIT(12)
#define VMX_QUAL_CR_LMSW_OPMEM __BIT(6)
#define VMX_QUAL_CR_LMSW_SRC __BIT(31,16)
#define VMX_QUAL_IO_IN __BIT(3)
#define VMX_QUAL_IO_STR __BIT(4)
#define VMX_QUAL_IO_REP __BIT(5)
#define VMX_QUAL_IO_DX __BIT(6)
#define IA32_FEATURE_CONTROL_LOCK __BIT(0)
#define IA32_FEATURE_CONTROL_IN_SMX __BIT(1)
#define IA32_FEATURE_CONTROL_OUT_SMX __BIT(2)
#define IA32_VMX_BASIC_MEM_WIDTH __BIT(48)
#define IA32_VMX_BASIC_DUAL __BIT(49)
#define VMX_EPT_VIOLATION_READ __BIT(0)
#define VMX_EPT_VIOLATION_WRITE __BIT(1)
#define VMX_EPT_VIOLATION_EXECUTE __BIT(2)
#define IA32_VMX_BASIC_IO_REPORT __BIT(54)
#define IA32_VMX_BASIC_TRUE_CTLS __BIT(55)
#define IA32_VMX_EPT_VPID_XO __BIT(0)
#define IA32_VMX_EPT_VPID_WALKLENGTH_4 __BIT(6)
#define IA32_VMX_EPT_VPID_UC __BIT(8)
#define IA32_VMX_EPT_VPID_WB __BIT(14)
#define IA32_VMX_EPT_VPID_2MB __BIT(16)
#define IA32_VMX_EPT_VPID_1GB __BIT(17)
#define IA32_VMX_EPT_VPID_INVEPT __BIT(20)
#define IA32_VMX_EPT_VPID_FLAGS_AD __BIT(21)
#define IA32_VMX_EPT_VPID_ADVANCED_VMEXIT_INFO __BIT(22)
#define IA32_VMX_EPT_VPID_SHSTK __BIT(23)
#define IA32_VMX_EPT_VPID_INVEPT_CONTEXT __BIT(25)
#define IA32_VMX_EPT_VPID_INVEPT_ALL __BIT(26)
#define IA32_VMX_EPT_VPID_INVVPID __BIT(32)
#define IA32_VMX_EPT_VPID_INVVPID_ADDR __BIT(40)
#define IA32_VMX_EPT_VPID_INVVPID_CONTEXT __BIT(41)
#define IA32_VMX_EPT_VPID_INVVPID_ALL __BIT(42)
#define IA32_VMX_EPT_VPID_INVVPID_CONTEXT_NOG __BIT(43)
bitmap[byte] &= ~__BIT(bitoff);
bitmap[2048 + byte] &= ~__BIT(bitoff);
#define VMX_SEG_ATTRIB_S __BIT(4)
#define VMX_SEG_ATTRIB_P __BIT(7)
#define VMX_SEG_ATTRIB_AVL __BIT(12)
#define VMX_SEG_ATTRIB_L __BIT(13)
#define VMX_SEG_ATTRIB_DEF __BIT(14)
#define VMX_SEG_ATTRIB_G __BIT(15)
#define VMX_SEG_ATTRIB_UNUSABLE __BIT(16)
#define EPTP_FLAGS_AD __BIT(6)
#define EPTP_SSS __BIT(7)
if (vmx_asidmap[oct] & __BIT(bit)) {
vmx_asidmap[oct] |= __BIT(bit);
vmx_asidmap[oct] &= ~__BIT(bit);
#define PIN_CTLS_INT_EXITING __BIT(0)
#define PIN_CTLS_NMI_EXITING __BIT(3)
((msrval & __BIT(32 + bitoff)) != 0)
((msrval & __BIT(bitoff)) == 0)
#define PIN_CTLS_VIRTUAL_NMIS __BIT(5)
#define PIN_CTLS_ACTIVATE_PREEMPT_TIMER __BIT(6)
if (!(set_one & __BIT(i))) {
#define PIN_CTLS_PROCESS_POSTED_INTS __BIT(7)
#define PROC_CTLS_INT_WINDOW_EXITING __BIT(2)
if (set_one & __BIT(i))
*res &= ~__BIT(i);
#define PROC_CTLS_USE_TSC_OFFSETTING __BIT(3)
if (set_zero & __BIT(i))
*res |= __BIT(i);
if (set_zero & __BIT(i)) {
*res &= ~__BIT(i);
} else if (set_one & __BIT(i)) {
*res |= __BIT(i);
*res &= ~__BIT(i);
#define PROC_CTLS_HLT_EXITING __BIT(7)
*res &= ~__BIT(i);
*res |= __BIT(i);
#define PROC_CTLS_INVLPG_EXITING __BIT(9)
#define PROC_CTLS_MWAIT_EXITING __BIT(10)
#define PROC_CTLS_RDPMC_EXITING __BIT(11)
#define PROC_CTLS_RDTSC_EXITING __BIT(12)
#define PROC_CTLS_RCR3_EXITING __BIT(15)
#define PROC_CTLS_LCR3_EXITING __BIT(16)
#define PROC_CTLS_RCR8_EXITING __BIT(19)
#define PROC_CTLS_LCR8_EXITING __BIT(20)
#define PROC_CTLS_USE_TPR_SHADOW __BIT(21)
#define PROC_CTLS_NMI_WINDOW_EXITING __BIT(22)
#define PROC_CTLS_DR_EXITING __BIT(23)
#define PROC_CTLS_UNCOND_IO_EXITING __BIT(24)
#define PROC_CTLS_USE_IO_BITMAPS __BIT(25)
#define PROC_CTLS_MONITOR_TRAP_FLAG __BIT(27)
vmx_asidmap[0] |= __BIT(0);
#define PROC_CTLS_USE_MSR_BITMAPS __BIT(28)
#define PROC_CTLS_MONITOR_EXITING __BIT(29)
#define PROC_CTLS_PAUSE_EXITING __BIT(30)
#define PROC_CTLS_ACTIVATE_CTLS2 __BIT(31)
#define EXIT_CTLS_SAVE_DEBUG_CONTROLS __BIT(2)
#define EXIT_CTLS_HOST_LONG_MODE __BIT(9)
#define EXIT_CTLS_LOAD_PERFGLOBALCTRL __BIT(12)
#define EXIT_CTLS_ACK_INTERRUPT __BIT(15)
#define EXIT_CTLS_SAVE_PAT __BIT(18)
#define EXIT_CTLS_LOAD_PAT __BIT(19)
#define EXIT_CTLS_SAVE_EFER __BIT(20)
#define EXIT_CTLS_LOAD_EFER __BIT(21)
#define EXIT_CTLS_SAVE_PREEMPT_TIMER __BIT(22)
#define EXIT_CTLS_CLEAR_BNDCFGS __BIT(23)
#define EXIT_CTLS_CONCEAL_PT __BIT(24)
#define EXIT_CTLS_CLEAR_RTIT_CTL __BIT(25)
#define EXIT_CTLS_LOAD_CET __BIT(28)
#define EXIT_CTLS_LOAD_PKRS __BIT(29)
#define ENTRY_CTLS_LOAD_DEBUG_CONTROLS __BIT(2)
#define ENTRY_CTLS_LONG_MODE __BIT(9)
#define ENTRY_CTLS_SMM __BIT(10)
#define ENTRY_CTLS_DISABLE_DUAL __BIT(11)
#define ENTRY_CTLS_LOAD_PERFGLOBALCTRL __BIT(13)
#define ENTRY_CTLS_LOAD_PAT __BIT(14)
#define ENTRY_CTLS_LOAD_EFER __BIT(15)
#define ENTRY_CTLS_LOAD_BNDCFGS __BIT(16)
#define ENTRY_CTLS_CONCEAL_PT __BIT(17)
#define ENTRY_CTLS_LOAD_RTIT_CTL __BIT(18)
#define ENTRY_CTLS_LOAD_CET __BIT(20)
#define ENTRY_CTLS_LOAD_PKRS __BIT(22)
#define INTR_INFO_ERROR __BIT(11)
#define INTR_INFO_VALID __BIT(31)
#define PROC_CTLS2_VIRT_APIC_ACCESSES __BIT(0)
#define PROC_CTLS2_ENABLE_EPT __BIT(1)
#define PROC_CTLS2_DESC_TABLE_EXITING __BIT(2)
#define PROC_CTLS2_ENABLE_RDTSCP __BIT(3)
#define PROC_CTLS2_VIRT_X2APIC __BIT(4)
#define PROC_CTLS2_ENABLE_VPID __BIT(5)
#define PROC_CTLS2_WBINVD_EXITING __BIT(6)
#define PROC_CTLS2_UNRESTRICTED_GUEST __BIT(7)
#define PROC_CTLS2_APIC_REG_VIRT __BIT(8)
#define PROC_CTLS2_VIRT_INT_DELIVERY __BIT(9)
#define PROC_CTLS2_PAUSE_LOOP_EXITING __BIT(10)
#define PROC_CTLS2_RDRAND_EXITING __BIT(11)
#define PROC_CTLS2_INVPCID_ENABLE __BIT(12)
#define PROC_CTLS2_VMFUNC_ENABLE __BIT(13)
#define PROC_CTLS2_VMCS_SHADOWING __BIT(14)
#define PROC_CTLS2_ENCLS_EXITING __BIT(15)
#define PROC_CTLS2_RDSEED_EXITING __BIT(16)
#define PROC_CTLS2_PML_ENABLE __BIT(17)
#define PROC_CTLS2_EPT_VIOLATION __BIT(18)
#define PROC_CTLS2_CONCEAL_VMX_FROM_PT __BIT(19)
#define PROC_CTLS2_XSAVES_ENABLE __BIT(20)
#define PROC_CTLS2_MODE_BASED_EXEC_EPT __BIT(22)
#define PROC_CTLS2_SUBPAGE_PERMISSIONS __BIT(23)
#define PROC_CTLS2_PT_USES_GPA __BIT(24)
#define PROC_CTLS2_USE_TSC_SCALING __BIT(25)
#define PROC_CTLS2_WAIT_PAUSE_ENABLE __BIT(26)
#define PROC_CTLS2_ENCLV_EXITING __BIT(28)
#define INT_STATE_STI __BIT(0)
#define INT_STATE_MOVSS __BIT(1)
#define INT_STATE_SMI __BIT(2)
#define INT_STATE_NMI __BIT(3)
#define INT_STATE_ENCLAVE __BIT(4)
#define VMCS_IDENT_SHADOW __BIT(31)
((__BIT(max_c((__m), (__n)) + 1) - 1) ^ (__BIT(min_c((__m), (__n))) - 1))
#define NVMM_CAP_ARCH_VCPU_CONF_CPUID __BIT(0)
#define NVMM_CAP_ARCH_VCPU_CONF_TPR __BIT(1)
#define CPUID_0_01_ECX_SSE3 __BIT(0)
#define CPUID_0_01_ECX_PCLMULQDQ __BIT(1)
#define CPUID_0_01_ECX_DTES64 __BIT(2)
#define CPUID_0_01_ECX_MONITOR __BIT(3)
#define CPUID_0_01_ECX_DS_CPL __BIT(4)
#define CPUID_0_01_ECX_VMX __BIT(5)
#define CPUID_0_01_ECX_SMX __BIT(6)
#define CPUID_0_01_ECX_EIST __BIT(7)
#define CPUID_0_01_ECX_TM2 __BIT(8)
#define CPUID_0_01_ECX_SSSE3 __BIT(9)
#define CPUID_0_01_ECX_CNXTID __BIT(10)
#define CPUID_0_01_ECX_SDBG __BIT(11)
#define CPUID_0_01_ECX_FMA __BIT(12)
#define CPUID_0_01_ECX_CX16 __BIT(13)
#define CPUID_0_01_ECX_XTPR __BIT(14)
#define CPUID_0_01_ECX_PDCM __BIT(15)
#define CPUID_0_01_ECX_PCID __BIT(17)
#define CPUID_0_01_ECX_DCA __BIT(18)
#define CPUID_0_01_ECX_SSE41 __BIT(19)
#define CPUID_0_01_ECX_SSE42 __BIT(20)
#define CPUID_0_01_ECX_X2APIC __BIT(21)
#define CPUID_0_01_ECX_MOVBE __BIT(22)
#define CPUID_0_01_ECX_POPCNT __BIT(23)
#define CPUID_0_01_ECX_TSC_DEADLINE __BIT(24)
#define CPUID_0_01_ECX_AESNI __BIT(25)
#define CPUID_0_01_ECX_XSAVE __BIT(26)
#define CPUID_0_01_ECX_OSXSAVE __BIT(27)
#define CPUID_0_01_ECX_AVX __BIT(28)
#define CPUID_0_01_ECX_F16C __BIT(29)
#define CPUID_0_01_ECX_RDRAND __BIT(30)
#define CPUID_0_01_ECX_RAZ __BIT(31)
#define CPUID_0_01_EDX_FPU __BIT(0)
#define CPUID_0_01_EDX_VME __BIT(1)
#define CPUID_0_01_EDX_DE __BIT(2)
#define CPUID_0_01_EDX_PSE __BIT(3)
#define CPUID_0_01_EDX_TSC __BIT(4)
#define CPUID_0_01_EDX_MSR __BIT(5)
#define CPUID_0_01_EDX_PAE __BIT(6)
#define CPUID_0_01_EDX_MCE __BIT(7)
#define CPUID_0_01_EDX_CX8 __BIT(8)
#define CPUID_0_01_EDX_APIC __BIT(9)
#define CPUID_0_01_EDX_SEP __BIT(11)
#define CPUID_0_01_EDX_MTRR __BIT(12)
#define CPUID_0_01_EDX_PGE __BIT(13)
#define CPUID_0_01_EDX_MCA __BIT(14)
#define CPUID_0_01_EDX_CMOV __BIT(15)
#define CPUID_0_01_EDX_PAT __BIT(16)
#define CPUID_0_01_EDX_PSE36 __BIT(17)
#define CPUID_0_01_EDX_PSN __BIT(18)
#define CPUID_0_01_EDX_CLFSH __BIT(19)
#define CPUID_0_01_EDX_DS __BIT(21)
#define CPUID_0_01_EDX_ACPI __BIT(22)
#define CPUID_0_01_EDX_MMX __BIT(23)
#define CPUID_0_01_EDX_FXSR __BIT(24)
#define CPUID_0_01_EDX_SSE __BIT(25)
#define CPUID_0_01_EDX_SSE2 __BIT(26)
#define CPUID_0_01_EDX_SS __BIT(27)
#define CPUID_0_01_EDX_HTT __BIT(28)
#define CPUID_0_01_EDX_TM __BIT(29)
#define CPUID_0_01_EDX_PBE __BIT(31)
#define CPUID_0_04_EAX_SELFINITCL __BIT(8)
#define CPUID_0_04_EAX_FULLASSOC __BIT(9)
#define CPUID_0_07_EBX_FSGSBASE __BIT(0)
#define CPUID_0_07_EBX_TSC_ADJUST __BIT(1)
#define CPUID_0_07_EBX_SGX __BIT(2)
#define CPUID_0_07_EBX_BMI1 __BIT(3)
#define CPUID_0_07_EBX_HLE __BIT(4)
#define CPUID_0_07_EBX_AVX2 __BIT(5)
#define CPUID_0_07_EBX_FDPEXONLY __BIT(6)
#define CPUID_0_07_EBX_SMEP __BIT(7)
#define CPUID_0_07_EBX_BMI2 __BIT(8)
#define CPUID_0_07_EBX_ERMS __BIT(9)
#define CPUID_0_07_EBX_INVPCID __BIT(10)
#define CPUID_0_07_EBX_RTM __BIT(11)
#define CPUID_0_07_EBX_QM __BIT(12)
#define CPUID_0_07_EBX_FPUCSDS __BIT(13)
#define CPUID_0_07_EBX_MPX __BIT(14)
#define CPUID_0_07_EBX_PQE __BIT(15)
#define CPUID_0_07_EBX_AVX512F __BIT(16)
#define CPUID_0_07_EBX_AVX512DQ __BIT(17)
#define CPUID_0_07_EBX_RDSEED __BIT(18)
#define CPUID_0_07_EBX_ADX __BIT(19)
#define CPUID_0_07_EBX_SMAP __BIT(20)
#define CPUID_0_07_EBX_AVX512_IFMA __BIT(21)
#define CPUID_0_07_EBX_CLFLUSHOPT __BIT(23)
#define CPUID_0_07_EBX_CLWB __BIT(24)
#define CPUID_0_07_EBX_PT __BIT(25)
#define CPUID_0_07_EBX_AVX512PF __BIT(26)
#define CPUID_0_07_EBX_AVX512ER __BIT(27)
#define CPUID_0_07_EBX_AVX512CD __BIT(28)
#define CPUID_0_07_EBX_SHA __BIT(29)
#define CPUID_0_07_EBX_AVX512BW __BIT(30)
#define CPUID_0_07_EBX_AVX512VL __BIT(31)
#define CPUID_0_07_ECX_PREFETCHWT1 __BIT(0)
#define CPUID_0_07_ECX_AVX512_VBMI __BIT(1)
#define CPUID_0_07_ECX_UMIP __BIT(2)
#define CPUID_0_07_ECX_PKU __BIT(3)
#define CPUID_0_07_ECX_OSPKE __BIT(4)
#define CPUID_0_07_ECX_WAITPKG __BIT(5)
#define CPUID_0_07_ECX_AVX512_VBMI2 __BIT(6)
#define CPUID_0_07_ECX_CET_SS __BIT(7)
#define CPUID_0_07_ECX_GFNI __BIT(8)
#define CPUID_0_07_ECX_VAES __BIT(9)
#define CPUID_0_07_ECX_VPCLMULQDQ __BIT(10)
#define CPUID_0_07_ECX_AVX512_VNNI __BIT(11)
#define CPUID_0_07_ECX_AVX512_BITALG __BIT(12)
#define CPUID_0_07_ECX_AVX512_VPOPCNTDQ __BIT(14)
#define CPUID_0_07_ECX_LA57 __BIT(16)
#define CPUID_0_07_ECX_RDPID __BIT(22)
#define CPUID_0_07_ECX_KL __BIT(23)
#define CPUID_0_07_ECX_CLDEMOTE __BIT(25)
#define CPUID_0_07_ECX_MOVDIRI __BIT(27)
#define CPUID_0_07_ECX_MOVDIR64B __BIT(28)
#define CPUID_0_07_ECX_SGXLC __BIT(30)
#define CPUID_0_07_ECX_PKS __BIT(31)
#define CPUID_0_07_EDX_AVX512_4VNNIW __BIT(2)
#define CPUID_0_07_EDX_AVX512_4FMAPS __BIT(3)
#define CPUID_0_07_EDX_FSREP_MOV __BIT(4)
#define CPUID_0_07_EDX_AVX512_VP2INTERSECT __BIT(8)
#define CPUID_0_07_EDX_SRBDS_CTRL __BIT(9)
#define CPUID_0_07_EDX_MD_CLEAR __BIT(10)
#define CPUID_0_07_EDX_TSX_FORCE_ABORT __BIT(13)
#define CPUID_0_07_EDX_SERIALIZE __BIT(14)
#define CPUID_0_07_EDX_HYBRID __BIT(15)
#define CPUID_0_07_EDX_TSXLDTRK __BIT(16)
#define CPUID_0_07_EDX_CET_IBT __BIT(20)
#define CPUID_0_07_EDX_IBRS __BIT(26)
#define CPUID_0_07_EDX_STIBP __BIT(27)
#define CPUID_0_07_EDX_L1D_FLUSH __BIT(28)
#define CPUID_0_07_EDX_ARCH_CAP __BIT(29)
#define CPUID_0_07_EDX_CORE_CAP __BIT(30)
#define CPUID_0_07_EDX_SSBD __BIT(31)
#define CPUID_0_0D_ECX1_EAX_XSAVEOPT __BIT(0)
#define CPUID_0_0D_ECX1_EAX_XSAVEC __BIT(1)
#define CPUID_0_0D_ECX1_EAX_XGETBV __BIT(2)
#define CPUID_0_0D_ECX1_EAX_XSAVES __BIT(3)
#define CPUID_8_01_ECX_LAHF __BIT(0)
#define CPUID_8_01_ECX_CMPLEGACY __BIT(1)
#define CPUID_8_01_ECX_SVM __BIT(2)
#define CPUID_8_01_ECX_EAPIC __BIT(3)
#define CPUID_8_01_ECX_ALTMOVCR8 __BIT(4)
#define CPUID_8_01_ECX_ABM __BIT(5)
#define CPUID_8_01_ECX_SSE4A __BIT(6)
#define CPUID_8_01_ECX_MISALIGNSSE __BIT(7)
#define CPUID_8_01_ECX_3DNOWPF __BIT(8)
#define CPUID_8_01_ECX_OSVW __BIT(9)
#define CPUID_8_01_ECX_IBS __BIT(10)
#define CPUID_8_01_ECX_XOP __BIT(11)
#define CPUID_8_01_ECX_SKINIT __BIT(12)
#define CPUID_8_01_ECX_WDT __BIT(13)
#define CPUID_8_01_ECX_LWP __BIT(15)
#define CPUID_8_01_ECX_FMA4 __BIT(16)
#define CPUID_8_01_ECX_TCE __BIT(17)
#define CPUID_8_01_ECX_NODEID __BIT(19)
#define CPUID_8_01_ECX_TBM __BIT(21)
#define CPUID_8_01_ECX_TOPOEXT __BIT(22)
#define CPUID_8_01_ECX_PCEC __BIT(23)
#define CPUID_8_01_ECX_PCENB __BIT(24)
#define CPUID_8_01_ECX_DBE __BIT(26)
#define CPUID_8_01_ECX_PERFTSC __BIT(27)
#define CPUID_8_01_ECX_PERFEXTLLC __BIT(28)
#define CPUID_8_01_ECX_MWAITX __BIT(29)
#define CPUID_8_01_EDX_FPU __BIT(0)
#define CPUID_8_01_EDX_VME __BIT(1)
#define CPUID_8_01_EDX_DE __BIT(2)
#define CPUID_8_01_EDX_PSE __BIT(3)
#define CPUID_8_01_EDX_TSC __BIT(4)
#define CPUID_8_01_EDX_MSR __BIT(5)
#define CPUID_8_01_EDX_PAE __BIT(6)
#define CPUID_8_01_EDX_MCE __BIT(7)
#define CPUID_8_01_EDX_CX8 __BIT(8)
#define CPUID_8_01_EDX_APIC __BIT(9)
#define CPUID_8_01_EDX_SYSCALL __BIT(11)
#define CPUID_8_01_EDX_MTRR __BIT(12)
#define CPUID_8_01_EDX_PGE __BIT(13)
#define CPUID_8_01_EDX_MCA __BIT(14)
#define CPUID_8_01_EDX_CMOV __BIT(15)
#define CPUID_8_01_EDX_PAT __BIT(16)
#define CPUID_8_01_EDX_PSE36 __BIT(17)
#define CPUID_8_01_EDX_XD __BIT(20)
#define CPUID_8_01_EDX_MMXEXT __BIT(22)
#define CPUID_8_01_EDX_MMX __BIT(23)
#define CPUID_8_01_EDX_FXSR __BIT(24)
#define CPUID_8_01_EDX_FFXSR __BIT(25)
#define CPUID_8_01_EDX_PAGE1GB __BIT(26)
#define CPUID_8_01_EDX_RDTSCP __BIT(27)
#define CPUID_8_01_EDX_LM __BIT(29)
#define CPUID_8_01_EDX_3DNOWEXT __BIT(30)
#define CPUID_8_01_EDX_3DNOW __BIT(31)
#define CPUID_8_07_EDX_TS __BIT(0)
#define CPUID_8_07_EDX_FID __BIT(1)
#define CPUID_8_07_EDX_VID __BIT(2)
#define CPUID_8_07_EDX_TTP __BIT(3)
#define CPUID_8_07_EDX_TM __BIT(4)
#define CPUID_8_07_EDX_100MHzSteps __BIT(6)
#define CPUID_8_07_EDX_HwPstate __BIT(7)
#define CPUID_8_07_EDX_TscInvariant __BIT(8)
#define CPUID_8_07_EDX_CPB __BIT(9)
#define CPUID_8_07_EDX_EffFreqRO __BIT(10)
#define CPUID_8_07_EDX_ProcFeedbackIntf __BIT(11)
#define CPUID_8_07_EDX_ProcPowerReport __BIT(12)
#define CPUID_8_08_EBX_CLZERO __BIT(0)
#define CPUID_8_08_EBX_InstRetCntMsr __BIT(1)
#define CPUID_8_08_EBX_RstrFpErrPtrs __BIT(2)
#define CPUID_8_08_EBX_INVLPGB __BIT(3)
#define CPUID_8_08_EBX_RDPRU __BIT(4)
#define CPUID_8_08_EBX_MCOMMIT __BIT(8)
#define CPUID_8_08_EBX_WBNOINVD __BIT(9)
#define CPUID_8_08_EBX_IBPB __BIT(12)
#define CPUID_8_08_EBX_INT_WBINVD __BIT(13)
#define CPUID_8_08_EBX_IBRS __BIT(14)
#define CPUID_8_08_EBX_STIBP __BIT(15)
#define CPUID_8_08_EBX_IBRS_ALWAYSON __BIT(16)
#define CPUID_8_08_EBX_STIBP_ALWAYSON __BIT(17)
#define CPUID_8_08_EBX_PREFER_IBRS __BIT(18)
#define CPUID_8_08_EBX_EferLmsleUnsupp __BIT(20)
#define CPUID_8_08_EBX_INVLPGBnestedPg __BIT(21)
#define CPUID_8_08_EBX_SSBD __BIT(24)
#define CPUID_8_08_EBX_VIRT_SSBD __BIT(25)
#define CPUID_8_08_EBX_SSB_NO __BIT(26)
#define CPUID_8_0A_EDX_NP __BIT(0)
#define CPUID_8_0A_EDX_LbrVirt __BIT(1)
#define CPUID_8_0A_EDX_SVML __BIT(2)
#define CPUID_8_0A_EDX_NRIPS __BIT(3)
#define CPUID_8_0A_EDX_TscRateMsr __BIT(4)
#define CPUID_8_0A_EDX_VmcbClean __BIT(5)
#define CPUID_8_0A_EDX_FlushByASID __BIT(6)
#define CPUID_8_0A_EDX_DecodeAssists __BIT(7)
#define CPUID_8_0A_EDX_PauseFilter __BIT(10)
#define CPUID_8_0A_EDX_PFThreshold __BIT(12)
#define CPUID_8_0A_EDX_AVIC __BIT(13)
#define CPUID_8_0A_EDX_VMSAVEvirt __BIT(15)
#define CPUID_8_0A_EDX_VGIF __BIT(16)
#define CPUID_8_0A_EDX_GMET __BIT(17)
#define CPUID_8_0A_EDX_SSSCheck __BIT(19)
#define CPUID_8_0A_EDX_SpecCtrl __BIT(20)
#define CPUID_8_0A_EDX_TlbiCtl __BIT(24)
#define SVM_EXIT_IO_A64 __BIT(9)
#define SVM_EXIT_IO_A32 __BIT(8)
#define SVM_EXIT_IO_A16 __BIT(7)
#define SVM_EXIT_IO_SZ32 __BIT(6)
#define SVM_EXIT_IO_SZ16 __BIT(5)
#define SVM_EXIT_IO_SZ8 __BIT(4)
#define SVM_EXIT_IO_REP __BIT(3)
#define SVM_EXIT_IO_STR __BIT(2)
#define SVM_EXIT_IO_IN __BIT(0)
#define SVM_MSRBM_READ __BIT(0)
#define SVM_MSRBM_WRITE __BIT(1)
#define SVM_SEG_ATTRIB_S __BIT(4)
#define SVM_SEG_ATTRIB_P __BIT(7)
#define SVM_SEG_ATTRIB_AVL __BIT(8)
#define SVM_SEG_ATTRIB_L __BIT(9)
#define SVM_SEG_ATTRIB_DEF __BIT(10)
#define SVM_SEG_ATTRIB_G __BIT(11)
if (svm_asidmap[oct] & __BIT(bit)) {
svm_asidmap[oct] |= __BIT(bit);
svm_asidmap[oct] &= ~__BIT(bit);
#define VMCB_CTRL_INTERCEPT_RCR(x) __BIT( 0 + x)
#define VMCB_CTRL_INTERCEPT_WCR(x) __BIT(16 + x)
#define VMCB_CTRL_INTERCEPT_RDR(x) __BIT( 0 + x)
#define VMCB_CTRL_INTERCEPT_WDR(x) __BIT(16 + x)
#define VMCB_CTRL_INTERCEPT_VEC(x) __BIT(x)
svm_asidmap[0] |= __BIT(0);
svm_asidmap[i] |= __BIT(j);
#define VMCB_CTRL_INTERCEPT_INTR __BIT(0)
#define VMCB_CTRL_INTERCEPT_NMI __BIT(1)
#define VMCB_CTRL_INTERCEPT_SMI __BIT(2)
#define VMCB_CTRL_INTERCEPT_INIT __BIT(3)
#define VMCB_CTRL_INTERCEPT_VINTR __BIT(4)
#define VMCB_CTRL_INTERCEPT_CR0_SPEC __BIT(5)
#define VMCB_CTRL_INTERCEPT_RIDTR __BIT(6)
#define VMCB_CTRL_INTERCEPT_RGDTR __BIT(7)
#define VMCB_CTRL_INTERCEPT_RLDTR __BIT(8)
#define VMCB_CTRL_INTERCEPT_RTR __BIT(9)
#define VMCB_CTRL_INTERCEPT_WIDTR __BIT(10)
#define VMCB_CTRL_INTERCEPT_WGDTR __BIT(11)
#define VMCB_CTRL_INTERCEPT_WLDTR __BIT(12)
#define VMCB_CTRL_INTERCEPT_WTR __BIT(13)
#define VMCB_CTRL_INTERCEPT_RDTSC __BIT(14)
#define VMCB_CTRL_INTERCEPT_RDPMC __BIT(15)
#define VMCB_CTRL_INTERCEPT_PUSHF __BIT(16)
#define VMCB_CTRL_INTERCEPT_POPF __BIT(17)
#define VMCB_CTRL_INTERCEPT_CPUID __BIT(18)
#define VMCB_CTRL_INTERCEPT_RSM __BIT(19)
#define VMCB_CTRL_INTERCEPT_IRET __BIT(20)
#define VMCB_CTRL_INTERCEPT_INTN __BIT(21)
#define VMCB_CTRL_INTERCEPT_INVD __BIT(22)
#define VMCB_CTRL_INTERCEPT_PAUSE __BIT(23)
#define VMCB_CTRL_INTERCEPT_HLT __BIT(24)
#define VMCB_CTRL_INTERCEPT_INVLPG __BIT(25)
#define VMCB_CTRL_INTERCEPT_INVLPGA __BIT(26)
#define VMCB_CTRL_INTERCEPT_IOIO_PROT __BIT(27)
#define VMCB_CTRL_INTERCEPT_MSR_PROT __BIT(28)
#define VMCB_CTRL_INTERCEPT_TASKSW __BIT(29)
#define VMCB_CTRL_INTERCEPT_FERR_FREEZE __BIT(30)
#define VMCB_CTRL_INTERCEPT_SHUTDOWN __BIT(31)
#define VMCB_CTRL_INTERCEPT_VMRUN __BIT(0)
#define VMCB_CTRL_INTERCEPT_VMMCALL __BIT(1)
#define VMCB_CTRL_INTERCEPT_VMLOAD __BIT(2)
#define VMCB_CTRL_INTERCEPT_VMSAVE __BIT(3)
#define VMCB_CTRL_INTERCEPT_STGI __BIT(4)
#define VMCB_CTRL_INTERCEPT_CLGI __BIT(5)
#define VMCB_CTRL_INTERCEPT_SKINIT __BIT(6)
#define VMCB_CTRL_INTERCEPT_RDTSCP __BIT(7)
#define VMCB_CTRL_INTERCEPT_ICEBP __BIT(8)
#define VMCB_CTRL_INTERCEPT_WBINVD __BIT(9)
#define VMCB_CTRL_INTERCEPT_MONITOR __BIT(10)
#define VMCB_CTRL_INTERCEPT_MWAIT __BIT(11)
#define VMCB_CTRL_INTERCEPT_MWAIT_ARMED __BIT(12)
#define VMCB_CTRL_INTERCEPT_XSETBV __BIT(13)
#define VMCB_CTRL_INTERCEPT_RDPRU __BIT(14)
#define VMCB_CTRL_INTERCEPT_EFER_SPEC __BIT(15)
#define VMCB_CTRL_INTERCEPT_WCR_SPEC(x) __BIT(16 + x)
#define VMCB_CTRL_INTERCEPT_INVLPGB_ALL __BIT(0)
#define VMCB_CTRL_INTERCEPT_INVLPGB_ILL __BIT(1)
#define VMCB_CTRL_INTERCEPT_PCID __BIT(2)
#define VMCB_CTRL_INTERCEPT_MCOMMIT __BIT(3)
#define VMCB_CTRL_INTERCEPT_TLBSYNC __BIT(4)
#define VMCB_CTRL_V_IRQ __BIT(8)
#define VMCB_CTRL_V_VGIF __BIT(9)
#define VMCB_CTRL_V_IGN_TPR __BIT(20)
#define VMCB_CTRL_V_INTR_MASKING __BIT(24)
#define VMCB_CTRL_V_GUEST_VGIF __BIT(25)
#define VMCB_CTRL_V_AVIC_EN __BIT(31)
#define VMCB_CTRL_INTR_SHADOW __BIT(0)
#define VMCB_CTRL_INTR_MASK __BIT(1)
#define VMCB_CTRL_EXITINTINFO_EV __BIT(11)
#define VMCB_CTRL_EXITINTINFO_V __BIT(31)
#define VMCB_CTRL_ENABLE_NP __BIT(0)
#define VMCB_CTRL_ENABLE_SEV __BIT(1)
#define VMCB_CTRL_ENABLE_ES_SEV __BIT(2)
#define VMCB_CTRL_ENABLE_GMET __BIT(3)
#define VMCB_CTRL_ENABLE_SSS __BIT(4)
#define VMCB_CTRL_ENABLE_VTE __BIT(5)
#define VMCB_CTRL_EVENTINJ_EV __BIT(11)
#define VMCB_CTRL_EVENTINJ_V __BIT(31)
#define VMCB_CTRL_ENABLE_LBR __BIT(0)
#define VMCB_CTRL_ENABLE_VVMSAVE __BIT(1)
#define VMCB_CTRL_VMCB_CLEAN_I __BIT(0)
#define VMCB_CTRL_VMCB_CLEAN_IOPM __BIT(1)
#define VMCB_CTRL_VMCB_CLEAN_ASID __BIT(2)
#define VMCB_CTRL_VMCB_CLEAN_TPR __BIT(3)
#define VMCB_CTRL_VMCB_CLEAN_NP __BIT(4)
#define VMCB_CTRL_VMCB_CLEAN_CR __BIT(5)
#define VMCB_CTRL_VMCB_CLEAN_DR __BIT(6)
#define VMCB_CTRL_VMCB_CLEAN_DT __BIT(7)
#define VMCB_CTRL_VMCB_CLEAN_SEG __BIT(8)
#define VMCB_CTRL_VMCB_CLEAN_CR2 __BIT(9)
#define VMCB_CTRL_VMCB_CLEAN_LBR __BIT(10)
#define VMCB_CTRL_VMCB_CLEAN_AVIC __BIT(11)
#define VMCB_CTRL_VMCB_CLEAN_CET __BIT(12)
#define VMX_QUAL_CR_LMSW_OPMEM __BIT(6)
#define VMX_QUAL_CR_LMSW_SRC __BIT(31,16)
#define VMX_QUAL_IO_IN __BIT(3)
#define VMX_QUAL_IO_STR __BIT(4)
#define VMX_QUAL_IO_REP __BIT(5)
#define VMX_QUAL_IO_DX __BIT(6)
#define IA32_FEATURE_CONTROL_LOCK __BIT(0)
#define IA32_FEATURE_CONTROL_IN_SMX __BIT(1)
#define IA32_FEATURE_CONTROL_OUT_SMX __BIT(2)
#define IA32_VMX_BASIC_MEM_WIDTH __BIT(48)
#define IA32_VMX_BASIC_DUAL __BIT(49)
#define VMX_EPT_VIOLATION_READ __BIT(0)
#define VMX_EPT_VIOLATION_WRITE __BIT(1)
#define VMX_EPT_VIOLATION_EXECUTE __BIT(2)
#define IA32_VMX_BASIC_IO_REPORT __BIT(54)
#define IA32_VMX_BASIC_TRUE_CTLS __BIT(55)
#define IA32_VMX_EPT_VPID_XO __BIT(0)
#define IA32_VMX_EPT_VPID_WALKLENGTH_4 __BIT(6)
#define IA32_VMX_EPT_VPID_UC __BIT(8)
#define IA32_VMX_EPT_VPID_WB __BIT(14)
#define IA32_VMX_EPT_VPID_2MB __BIT(16)
#define IA32_VMX_EPT_VPID_1GB __BIT(17)
#define IA32_VMX_EPT_VPID_INVEPT __BIT(20)
#define IA32_VMX_EPT_VPID_FLAGS_AD __BIT(21)
#define IA32_VMX_EPT_VPID_ADVANCED_VMEXIT_INFO __BIT(22)
#define IA32_VMX_EPT_VPID_SHSTK __BIT(23)
#define IA32_VMX_EPT_VPID_INVEPT_CONTEXT __BIT(25)
#define IA32_VMX_EPT_VPID_INVEPT_ALL __BIT(26)
#define IA32_VMX_EPT_VPID_INVVPID __BIT(32)
#define IA32_VMX_EPT_VPID_INVVPID_ADDR __BIT(40)
#define IA32_VMX_EPT_VPID_INVVPID_CONTEXT __BIT(41)
#define IA32_VMX_EPT_VPID_INVVPID_ALL __BIT(42)
#define IA32_VMX_EPT_VPID_INVVPID_CONTEXT_NOG __BIT(43)
bitmap[byte] &= ~__BIT(bitoff);
bitmap[2048 + byte] &= ~__BIT(bitoff);
#define VMX_SEG_ATTRIB_S __BIT(4)
#define VMX_SEG_ATTRIB_P __BIT(7)
#define VMX_SEG_ATTRIB_AVL __BIT(12)
#define VMX_SEG_ATTRIB_L __BIT(13)
#define VMX_SEG_ATTRIB_DEF __BIT(14)
#define VMX_SEG_ATTRIB_G __BIT(15)
#define VMX_SEG_ATTRIB_UNUSABLE __BIT(16)
#define EPTP_FLAGS_AD __BIT(6)
#define EPTP_SSS __BIT(7)
if (vmx_asidmap[oct] & __BIT(bit)) {
vmx_asidmap[oct] |= __BIT(bit);
vmx_asidmap[oct] &= ~__BIT(bit);
#define PIN_CTLS_INT_EXITING __BIT(0)
#define PIN_CTLS_NMI_EXITING __BIT(3)
((msrval & __BIT(32 + bitoff)) != 0)
((msrval & __BIT(bitoff)) == 0)
#define PIN_CTLS_VIRTUAL_NMIS __BIT(5)
#define PIN_CTLS_ACTIVATE_PREEMPT_TIMER __BIT(6)
if (!(set_one & __BIT(i))) {
#define PIN_CTLS_PROCESS_POSTED_INTS __BIT(7)
#define PROC_CTLS_INT_WINDOW_EXITING __BIT(2)
if (set_one & __BIT(i))
*res &= ~__BIT(i);
#define PROC_CTLS_USE_TSC_OFFSETTING __BIT(3)
if (set_zero & __BIT(i))
*res |= __BIT(i);
if (set_zero & __BIT(i)) {
*res &= ~__BIT(i);
} else if (set_one & __BIT(i)) {
*res |= __BIT(i);
*res &= ~__BIT(i);
#define PROC_CTLS_HLT_EXITING __BIT(7)
*res &= ~__BIT(i);
*res |= __BIT(i);
#define PROC_CTLS_INVLPG_EXITING __BIT(9)
#define PROC_CTLS_MWAIT_EXITING __BIT(10)
#define PROC_CTLS_RDPMC_EXITING __BIT(11)
#define PROC_CTLS_RDTSC_EXITING __BIT(12)
#define PROC_CTLS_RCR3_EXITING __BIT(15)
#define PROC_CTLS_LCR3_EXITING __BIT(16)
#define PROC_CTLS_RCR8_EXITING __BIT(19)
#define PROC_CTLS_LCR8_EXITING __BIT(20)
#define PROC_CTLS_USE_TPR_SHADOW __BIT(21)
#define PROC_CTLS_NMI_WINDOW_EXITING __BIT(22)
#define PROC_CTLS_DR_EXITING __BIT(23)
#define PROC_CTLS_UNCOND_IO_EXITING __BIT(24)
#define PROC_CTLS_USE_IO_BITMAPS __BIT(25)
#define PROC_CTLS_MONITOR_TRAP_FLAG __BIT(27)
vmx_asidmap[0] |= __BIT(0);
#define PROC_CTLS_USE_MSR_BITMAPS __BIT(28)
#define PROC_CTLS_MONITOR_EXITING __BIT(29)
#define PROC_CTLS_PAUSE_EXITING __BIT(30)
#define PROC_CTLS_ACTIVATE_CTLS2 __BIT(31)
#define EXIT_CTLS_SAVE_DEBUG_CONTROLS __BIT(2)
#define EXIT_CTLS_HOST_LONG_MODE __BIT(9)
#define EXIT_CTLS_LOAD_PERFGLOBALCTRL __BIT(12)
#define EXIT_CTLS_ACK_INTERRUPT __BIT(15)
#define EXIT_CTLS_SAVE_PAT __BIT(18)
#define EXIT_CTLS_LOAD_PAT __BIT(19)
#define EXIT_CTLS_SAVE_EFER __BIT(20)
#define EXIT_CTLS_LOAD_EFER __BIT(21)
#define EXIT_CTLS_SAVE_PREEMPT_TIMER __BIT(22)
#define EXIT_CTLS_CLEAR_BNDCFGS __BIT(23)
#define EXIT_CTLS_CONCEAL_PT __BIT(24)
#define EXIT_CTLS_CLEAR_RTIT_CTL __BIT(25)
#define EXIT_CTLS_LOAD_CET __BIT(28)
#define EXIT_CTLS_LOAD_PKRS __BIT(29)
#define ENTRY_CTLS_LOAD_DEBUG_CONTROLS __BIT(2)
#define ENTRY_CTLS_LONG_MODE __BIT(9)
#define ENTRY_CTLS_SMM __BIT(10)
#define ENTRY_CTLS_DISABLE_DUAL __BIT(11)
#define ENTRY_CTLS_LOAD_PERFGLOBALCTRL __BIT(13)
#define ENTRY_CTLS_LOAD_PAT __BIT(14)
#define ENTRY_CTLS_LOAD_EFER __BIT(15)
#define ENTRY_CTLS_LOAD_BNDCFGS __BIT(16)
#define ENTRY_CTLS_CONCEAL_PT __BIT(17)
#define ENTRY_CTLS_LOAD_RTIT_CTL __BIT(18)
#define ENTRY_CTLS_LOAD_CET __BIT(20)
#define ENTRY_CTLS_LOAD_PKRS __BIT(22)
#define INTR_INFO_ERROR __BIT(11)
#define INTR_INFO_VALID __BIT(31)
#define PROC_CTLS2_VIRT_APIC_ACCESSES __BIT(0)
#define PROC_CTLS2_ENABLE_EPT __BIT(1)
#define PROC_CTLS2_DESC_TABLE_EXITING __BIT(2)
#define PROC_CTLS2_ENABLE_RDTSCP __BIT(3)
#define PROC_CTLS2_VIRT_X2APIC __BIT(4)
#define PROC_CTLS2_ENABLE_VPID __BIT(5)
#define PROC_CTLS2_WBINVD_EXITING __BIT(6)
#define PROC_CTLS2_UNRESTRICTED_GUEST __BIT(7)
#define PROC_CTLS2_APIC_REG_VIRT __BIT(8)
#define PROC_CTLS2_VIRT_INT_DELIVERY __BIT(9)
#define PROC_CTLS2_PAUSE_LOOP_EXITING __BIT(10)
#define PROC_CTLS2_RDRAND_EXITING __BIT(11)
#define PROC_CTLS2_INVPCID_ENABLE __BIT(12)
#define PROC_CTLS2_VMFUNC_ENABLE __BIT(13)
#define PROC_CTLS2_VMCS_SHADOWING __BIT(14)
#define PROC_CTLS2_ENCLS_EXITING __BIT(15)
#define PROC_CTLS2_RDSEED_EXITING __BIT(16)
#define PROC_CTLS2_PML_ENABLE __BIT(17)
#define PROC_CTLS2_EPT_VIOLATION __BIT(18)
#define PROC_CTLS2_CONCEAL_VMX_FROM_PT __BIT(19)
#define PROC_CTLS2_XSAVES_ENABLE __BIT(20)
#define PROC_CTLS2_MODE_BASED_EXEC_EPT __BIT(22)
#define PROC_CTLS2_SUBPAGE_PERMISSIONS __BIT(23)
#define PROC_CTLS2_PT_USES_GPA __BIT(24)
#define PROC_CTLS2_USE_TSC_SCALING __BIT(25)
#define PROC_CTLS2_WAIT_PAUSE_ENABLE __BIT(26)
#define PROC_CTLS2_ENCLV_EXITING __BIT(28)
#define INT_STATE_STI __BIT(0)
#define INT_STATE_MOVSS __BIT(1)
#define INT_STATE_SMI __BIT(2)
#define INT_STATE_NMI __BIT(3)
#define INT_STATE_ENCLAVE __BIT(4)
#define VMCS_IDENT_SHADOW __BIT(31)
if (val & __BIT(7))
if (val & __BIT(15))
if (val & __BIT(31))