#include <machine/asm.h>
.syntax unified
ENTRY(memcpy)
pld [r1]
cmp r2, #0x0c
ble .Lmemcpy_short
mov r3, r0
ands ip, r3, #0x03
beq .Lmemcpy_wordaligned
cmp ip, #0x02
ldrb ip, [r1], #0x01
sub r2, r2, #0x01
strb ip, [r3], #0x01
ldrble ip, [r1], #0x01
suble r2, r2, #0x01
strble ip, [r3], #0x01
ldrblt ip, [r1], #0x01
sublt r2, r2, #0x01
strblt ip, [r3], #0x01
.Lmemcpy_wordaligned:
ands ip, r1, #0x03
bne .Lmemcpy_bad_align
tst r3, #0x07
ldrne ip, [r1], #0x04
stmfd sp!, {r4-r9}
subne r2, r2, #0x04
strne ip, [r3], #0x04
subs r2, r2, #0x80
blt .Lmemcpy_w_lessthan128
.Lmemcpy_w_loop128:
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
pld [r1, #0x18]
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
ldr r8, [r1], #0x04
ldr r9, [r1], #0x04
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
strd r6, [r3], #0x08
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
pld [r1, #0x18]
strd r8, [r3], #0x08
ldr r8, [r1], #0x04
ldr r9, [r1], #0x04
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
strd r6, [r3], #0x08
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
strd r8, [r3], #0x08
ldr r8, [r1], #0x04
ldr r9, [r1], #0x04
pld [r1, #0x18]
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
strd r6, [r3], #0x08
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
strd r8, [r3], #0x08
ldr r8, [r1], #0x04
ldr r9, [r1], #0x04
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
pld [r1, #0x18]
strd r6, [r3], #0x08
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
strd r8, [r3], #0x08
ldr r8, [r1], #0x04
ldr r9, [r1], #0x04
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
strd r6, [r3], #0x08
strd r8, [r3], #0x08
subs r2, r2, #0x80
strd r4, [r3], #0x08
bge .Lmemcpy_w_loop128
.Lmemcpy_w_lessthan128:
adds r2, r2, #0x80
ldmfdeq sp!, {r4-r9}
bxeq lr
subs r2, r2, #0x20
blt .Lmemcpy_w_lessthan32
.Lmemcpy_w_loop32:
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
pld [r1, #0x18]
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
ldr r8, [r1], #0x04
ldr r9, [r1], #0x04
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
strd r6, [r3], #0x08
strd r8, [r3], #0x08
subs r2, r2, #0x20
strd r4, [r3], #0x08
bge .Lmemcpy_w_loop32
.Lmemcpy_w_lessthan32:
adds r2, r2, #0x20
ldmfdeq sp!, {r4-r9}
bxeq lr
and r4, r2, #0x18
rsbs r4, r4, #0x18
addne pc, pc, r4, lsl #1
nop
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
sub r2, r2, #0x08
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
sub r2, r2, #0x08
strd r4, [r3], #0x08
ldr r4, [r1], #0x04
ldr r5, [r1], #0x04
subs r2, r2, #0x08
strd r4, [r3], #0x08
ldmfd sp!, {r4-r9}
bxeq lr
subs r2, r2, #0x04
ldrge ip, [r1], #0x04
strge ip, [r3], #0x04
bxeq lr
addlt r2, r2, #0x04
ldrb ip, [r1], #0x01
cmp r2, #0x02
ldrbge r2, [r1], #0x01
strb ip, [r3], #0x01
ldrbgt ip, [r1]
strbge r2, [r3], #0x01
strbgt ip, [r3]
bx lr
.Lmemcpy_bad_align:
stmfd sp!, {r4-r7}
bic r1, r1, #0x03
cmp ip, #2
ldr ip, [r1], #0x04
bgt .Lmemcpy_bad3
beq .Lmemcpy_bad2
b .Lmemcpy_bad1
.Lmemcpy_bad1_loop16:
mov r4, ip, lsr #8
ldr r5, [r1], #0x04
pld [r1, #0x018]
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
ldr ip, [r1], #0x04
orr r4, r4, r5, lsl #24
mov r5, r5, lsr #8
orr r5, r5, r6, lsl #24
mov r6, r6, lsr #8
orr r6, r6, r7, lsl #24
mov r7, r7, lsr #8
orr r7, r7, ip, lsl #24
str r4, [r3], #0x04
str r5, [r3], #0x04
str r6, [r3], #0x04
str r7, [r3], #0x04
.Lmemcpy_bad1:
subs r2, r2, #0x10
bge .Lmemcpy_bad1_loop16
adds r2, r2, #0x10
ldmfdeq sp!, {r4-r7}
bxeq lr
subs r2, r2, #0x04
sublt r1, r1, #0x03
blt .Lmemcpy_bad_done
.Lmemcpy_bad1_loop4:
mov r4, ip, lsr #8
ldr ip, [r1], #0x04
subs r2, r2, #0x04
orr r4, r4, ip, lsl #24
str r4, [r3], #0x04
bge .Lmemcpy_bad1_loop4
sub r1, r1, #0x03
b .Lmemcpy_bad_done
.Lmemcpy_bad2_loop16:
mov r4, ip, lsr #16
ldr r5, [r1], #0x04
pld [r1, #0x018]
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
ldr ip, [r1], #0x04
orr r4, r4, r5, lsl #16
mov r5, r5, lsr #16
orr r5, r5, r6, lsl #16
mov r6, r6, lsr #16
orr r6, r6, r7, lsl #16
mov r7, r7, lsr #16
orr r7, r7, ip, lsl #16
str r4, [r3], #0x04
str r5, [r3], #0x04
str r6, [r3], #0x04
str r7, [r3], #0x04
.Lmemcpy_bad2:
subs r2, r2, #0x10
bge .Lmemcpy_bad2_loop16
adds r2, r2, #0x10
ldmfdeq sp!, {r4-r7}
bxeq lr
subs r2, r2, #0x04
sublt r1, r1, #0x02
blt .Lmemcpy_bad_done
.Lmemcpy_bad2_loop4:
mov r4, ip, lsr #16
ldr ip, [r1], #0x04
subs r2, r2, #0x04
orr r4, r4, ip, lsl #16
str r4, [r3], #0x04
bge .Lmemcpy_bad2_loop4
sub r1, r1, #0x02
b .Lmemcpy_bad_done
.Lmemcpy_bad3_loop16:
mov r4, ip, lsr #24
ldr r5, [r1], #0x04
pld [r1, #0x018]
ldr r6, [r1], #0x04
ldr r7, [r1], #0x04
ldr ip, [r1], #0x04
orr r4, r4, r5, lsl #8
mov r5, r5, lsr #24
orr r5, r5, r6, lsl #8
mov r6, r6, lsr #24
orr r6, r6, r7, lsl #8
mov r7, r7, lsr #24
orr r7, r7, ip, lsl #8
str r4, [r3], #0x04
str r5, [r3], #0x04
str r6, [r3], #0x04
str r7, [r3], #0x04
.Lmemcpy_bad3:
subs r2, r2, #0x10
bge .Lmemcpy_bad3_loop16
adds r2, r2, #0x10
ldmfdeq sp!, {r4-r7}
bxeq lr
subs r2, r2, #0x04
sublt r1, r1, #0x01
blt .Lmemcpy_bad_done
.Lmemcpy_bad3_loop4:
mov r4, ip, lsr #24
ldr ip, [r1], #0x04
subs r2, r2, #0x04
orr r4, r4, ip, lsl #8
str r4, [r3], #0x04
bge .Lmemcpy_bad3_loop4
sub r1, r1, #0x01
.Lmemcpy_bad_done:
ldmfd sp!, {r4-r7}
adds r2, r2, #0x04
bxeq lr
ldrb ip, [r1], #0x01
cmp r2, #0x02
ldrbge r2, [r1], #0x01
strb ip, [r3], #0x01
ldrbgt ip, [r1]
strbge r2, [r3], #0x01
strbgt ip, [r3]
bx lr
.Lmemcpy_short:
#ifndef _STANDALONE
add pc, pc, r2, lsl #2
nop
bx lr
b .Lmemcpy_bytewise
b .Lmemcpy_bytewise
b .Lmemcpy_bytewise
b .Lmemcpy_4
b .Lmemcpy_bytewise
b .Lmemcpy_6
b .Lmemcpy_bytewise
b .Lmemcpy_8
b .Lmemcpy_bytewise
b .Lmemcpy_bytewise
b .Lmemcpy_bytewise
b .Lmemcpy_c
#endif
.Lmemcpy_bytewise:
mov r3, r0
ldrb ip, [r1], #0x01
1: subs r2, r2, #0x01
strb ip, [r3], #0x01
ldrbne ip, [r1], #0x01
bne 1b
bx lr
#ifndef _STANDALONE
#define LMEMCPY_4_LOG2 6
#define LMEMCPY_4_PAD .align LMEMCPY_4_LOG2
LMEMCPY_4_PAD
.Lmemcpy_4:
and r2, r1, #0x03
orr r2, r2, r0, lsl #2
ands r2, r2, #0x0f
sub r3, pc, #0x14
addne pc, r3, r2, lsl #LMEMCPY_4_LOG2
ldr r2, [r1]
str r2, [r0]
bx lr
LMEMCPY_4_PAD
ldr r3, [r1, #-1]
ldr r2, [r1, #3]
mov r3, r3, lsr #8
orr r3, r3, r2, lsl #24
str r3, [r0]
bx lr
LMEMCPY_4_PAD
ldrh r3, [r1, #0x02]
ldrh r2, [r1]
orr r3, r2, r3, lsl #16
str r3, [r0]
bx lr
LMEMCPY_4_PAD
ldr r3, [r1, #-3]
ldr r2, [r1, #1]
mov r3, r3, lsr #24
orr r3, r3, r2, lsl #8
str r3, [r0]
bx lr
LMEMCPY_4_PAD
ldr r2, [r1]
strb r2, [r0]
mov r3, r2, lsr #8
mov r1, r2, lsr #24
strb r1, [r0, #0x03]
strh r3, [r0, #0x01]
bx lr
LMEMCPY_4_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrb r1, [r1, #0x03]
strb r2, [r0]
strh r3, [r0, #0x01]
strb r1, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
ldrh r2, [r1]
ldrh r3, [r1, #0x02]
strb r2, [r0]
mov r2, r2, lsr #8
orr r2, r2, r3, lsl #8
mov r3, r3, lsr #8
strh r2, [r0, #0x01]
strb r3, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrb r1, [r1, #0x03]
strb r2, [r0]
strh r3, [r0, #0x01]
strb r1, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
ldr r2, [r1]
strh r2, [r0]
mov r3, r2, lsr #16
strh r3, [r0, #0x02]
bx lr
LMEMCPY_4_PAD
ldr r2, [r1, #-1]
ldr r3, [r1, #3]
mov r1, r2, lsr #8
strh r1, [r0]
mov r2, r2, lsr #24
orr r2, r2, r3, lsl #8
strh r2, [r0, #0x02]
bx lr
LMEMCPY_4_PAD
ldrh r2, [r1]
ldrh r3, [r1, #0x02]
strh r2, [r0]
strh r3, [r0, #0x02]
bx lr
LMEMCPY_4_PAD
ldr r3, [r1, #1]
ldr r2, [r1, #-3]
mov r1, r3, lsr #8
strh r1, [r0, #0x02]
mov r3, r3, lsl #8
orr r3, r3, r2, lsr #24
strh r3, [r0]
bx lr
LMEMCPY_4_PAD
ldr r2, [r1]
strb r2, [r0]
mov r3, r2, lsr #8
mov r1, r2, lsr #24
strh r3, [r0, #0x01]
strb r1, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrb r1, [r1, #0x03]
strb r2, [r0]
strh r3, [r0, #0x01]
strb r1, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
ldrh r2, [r1]
ldrh r3, [r1, #0x02]
strb r2, [r0]
mov r2, r2, lsr #8
orr r2, r2, r3, lsl #8
strh r2, [r0, #0x01]
mov r3, r3, lsr #8
strb r3, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrb r1, [r1, #0x03]
strb r2, [r0]
strh r3, [r0, #0x01]
strb r1, [r0, #0x03]
bx lr
LMEMCPY_4_PAD
#define LMEMCPY_6_LOG2 6
#define LMEMCPY_6_PAD .align LMEMCPY_6_LOG2
LMEMCPY_6_PAD
.Lmemcpy_6:
and r2, r1, #0x03
orr r2, r2, r0, lsl #2
ands r2, r2, #0x0f
sub r3, pc, #0x14
addne pc, r3, r2, lsl #LMEMCPY_6_LOG2
ldr r2, [r1]
ldrh r3, [r1, #0x04]
str r2, [r0]
strh r3, [r0, #0x04]
bx lr
LMEMCPY_6_PAD
ldr r2, [r1, #-1]
ldr r3, [r1, #0x03]
mov r2, r2, lsr #8
orr r2, r2, r3, lsl #24
mov r3, r3, lsr #8
str r2, [r0]
strh r3, [r0, #0x04]
bx lr
LMEMCPY_6_PAD
ldr r3, [r1, #0x02]
ldrh r2, [r1]
mov r1, r3, lsr #16
orr r2, r2, r3, lsl #16
str r2, [r0]
strh r1, [r0, #0x04]
bx lr
LMEMCPY_6_PAD
ldr r2, [r1, #-3]
ldr r3, [r1, #1]
ldr r1, [r1, #5]
mov r2, r2, lsr #24
orr r2, r2, r3, lsl #8
mov r1, r1, lsl #8
orr r1, r1, r3, lsr #24
str r2, [r0]
strh r1, [r0, #0x04]
bx lr
LMEMCPY_6_PAD
ldr r3, [r1]
ldrh r2, [r1, #0x04]
mov r1, r3, lsr #8
strh r1, [r0, #0x01]
strb r3, [r0]
mov r3, r3, lsr #24
orr r3, r3, r2, lsl #8
mov r2, r2, lsr #8
strh r3, [r0, #0x03]
strb r2, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrh ip, [r1, #0x03]
ldrb r1, [r1, #0x05]
strb r2, [r0]
strh r3, [r0, #0x01]
strh ip, [r0, #0x03]
strb r1, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
ldrh r2, [r1]
ldr r1, [r1, #0x02]
strb r2, [r0]
mov r3, r1, lsr #24
strb r3, [r0, #0x05]
mov r3, r1, lsr #8
strh r3, [r0, #0x03]
mov r3, r2, lsr #8
orr r3, r3, r1, lsl #8
strh r3, [r0, #0x01]
bx lr
LMEMCPY_6_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrh ip, [r1, #0x03]
ldrb r1, [r1, #0x05]
strb r2, [r0]
strh r3, [r0, #0x01]
strh ip, [r0, #0x03]
strb r1, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
ldrh r2, [r1, #0x04]
ldr r3, [r1]
mov r2, r2, lsl #16
orr r2, r2, r3, lsr #16
strh r3, [r0]
str r2, [r0, #0x02]
bx lr
LMEMCPY_6_PAD
ldr r3, [r1, #-1]
ldr r2, [r1, #3]
mov r1, r3, lsr #8
mov r2, r2, lsl #8
orr r2, r2, r3, lsr #24
strh r1, [r0]
str r2, [r0, #0x02]
bx lr
LMEMCPY_6_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
strh r2, [r0]
str r3, [r0, #0x02]
bx lr
LMEMCPY_6_PAD
ldrb r3, [r1]
ldr r2, [r1, #0x01]
ldrb r1, [r1, #0x05]
orr r3, r3, r2, lsl #8
mov r1, r1, lsl #24
orr r1, r1, r2, lsr #8
strh r3, [r0]
str r1, [r0, #0x02]
bx lr
LMEMCPY_6_PAD
ldr r2, [r1]
ldrh r1, [r1, #0x04]
strb r2, [r0]
mov r2, r2, lsr #8
orr r2, r2, r1, lsl #24
mov r1, r1, lsr #8
str r2, [r0, #0x01]
strb r1, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldrh ip, [r1, #0x03]
ldrb r1, [r1, #0x05]
strb r2, [r0]
strh r3, [r0, #0x01]
strh ip, [r0, #0x03]
strb r1, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
ldrh r2, [r1]
ldr r1, [r1, #0x02]
strb r2, [r0]
mov r2, r2, lsr #8
orr r2, r2, r1, lsl #8
mov r1, r1, lsr #24
str r2, [r0, #0x01]
strb r1, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
ldrb r2, [r1]
ldr r3, [r1, #0x01]
ldrb r1, [r1, #0x05]
strb r2, [r0]
str r3, [r0, #0x01]
strb r1, [r0, #0x05]
bx lr
LMEMCPY_6_PAD
#define LMEMCPY_8_LOG2 6
#define LMEMCPY_8_PAD .align LMEMCPY_8_LOG2
LMEMCPY_8_PAD
.Lmemcpy_8:
and r2, r1, #0x03
orr r2, r2, r0, lsl #2
ands r2, r2, #0x0f
sub r3, pc, #0x14
addne pc, r3, r2, lsl #LMEMCPY_8_LOG2
ldr r2, [r1]
ldr r3, [r1, #0x04]
str r2, [r0]
str r3, [r0, #0x04]
bx lr
LMEMCPY_8_PAD
ldr r3, [r1, #-1]
ldr r2, [r1, #0x03]
ldrb r1, [r1, #0x07]
mov r3, r3, lsr #8
orr r3, r3, r2, lsl #24
mov r1, r1, lsl #24
orr r2, r1, r2, lsr #8
str r3, [r0]
str r2, [r0, #0x04]
bx lr
LMEMCPY_8_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldrh r1, [r1, #0x06]
orr r2, r2, r3, lsl #16
mov r3, r3, lsr #16
orr r3, r3, r1, lsl #16
str r2, [r0]
str r3, [r0, #0x04]
bx lr
LMEMCPY_8_PAD
ldrb r3, [r1]
ldr r2, [r1, #0x01]
ldr r1, [r1, #0x05]
orr r3, r3, r2, lsl #8
mov r2, r2, lsr #24
orr r2, r2, r1, lsl #8
str r3, [r0]
str r2, [r0, #0x04]
bx lr
LMEMCPY_8_PAD
ldr r3, [r1]
ldr r2, [r1, #0x04]
strb r3, [r0]
mov r1, r2, lsr #24
strb r1, [r0, #0x07]
mov r1, r3, lsr #8
mov r3, r3, lsr #24
orr r3, r3, r2, lsl #8
strh r1, [r0, #0x01]
str r3, [r0, #0x03]
bx lr
LMEMCPY_8_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldr ip, [r1, #0x03]
ldrb r1, [r1, #0x07]
strb r2, [r0]
strh r3, [r0, #0x01]
str ip, [r0, #0x03]
strb r1, [r0, #0x07]
bx lr
LMEMCPY_8_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldrh r1, [r1, #0x06]
strb r2, [r0]
mov ip, r1, lsr #8
strb ip, [r0, #0x07]
mov ip, r2, lsr #8
orr ip, ip, r3, lsl #8
mov r3, r3, lsr #8
orr r3, r3, r1, lsl #24
strh ip, [r0, #0x01]
str r3, [r0, #0x03]
bx lr
LMEMCPY_8_PAD
ldrb r3, [r1]
ldr ip, [r1, #0x01]
ldrh r2, [r1, #0x05]
ldrb r1, [r1, #0x07]
strb r3, [r0]
mov r3, ip, lsr #16
strh ip, [r0, #0x01]
orr r2, r3, r2, lsl #16
str r2, [r0, #0x03]
strb r1, [r0, #0x07]
bx lr
LMEMCPY_8_PAD
ldr r2, [r1]
ldr r3, [r1, #0x04]
mov r1, r2, lsr #16
strh r2, [r0]
orr r2, r1, r3, lsl #16
mov r3, r3, lsr #16
str r2, [r0, #0x02]
strh r3, [r0, #0x06]
bx lr
LMEMCPY_8_PAD
ldr r2, [r1, #-1]
ldr r3, [r1, #0x03]
ldrb ip, [r1, #0x07]
mov r1, r2, lsr #8
strh r1, [r0]
mov r1, r2, lsr #24
orr r1, r1, r3, lsl #8
mov r3, r3, lsr #24
orr r3, r3, ip, lsl #8
str r1, [r0, #0x02]
strh r3, [r0, #0x06]
bx lr
LMEMCPY_8_PAD
ldrh r2, [r1]
ldr ip, [r1, #0x02]
ldrh r3, [r1, #0x06]
strh r2, [r0]
str ip, [r0, #0x02]
strh r3, [r0, #0x06]
bx lr
LMEMCPY_8_PAD
ldr r3, [r1, #0x05]
ldr r2, [r1, #0x01]
ldrb ip, [r1]
mov r1, r3, lsr #8
strh r1, [r0, #0x06]
mov r3, r3, lsl #24
orr r3, r3, r2, lsr #8
orr r2, ip, r2, lsl #8
str r3, [r0, #0x02]
strh r2, [r0]
bx lr
LMEMCPY_8_PAD
ldr r3, [r1, #0x04]
ldr r2, [r1]
mov r1, r3, lsr #8
strh r1, [r0, #0x05]
strb r2, [r0]
mov r1, r3, lsr #24
strb r1, [r0, #0x07]
mov r2, r2, lsr #8
orr r2, r2, r3, lsl #24
str r2, [r0, #0x01]
bx lr
LMEMCPY_8_PAD
ldrb r3, [r1]
ldrh r2, [r1, #0x01]
ldr ip, [r1, #0x03]
ldrb r1, [r1, #0x07]
strb r3, [r0]
mov r3, ip, lsr #16
strh r3, [r0, #0x05]
orr r2, r2, ip, lsl #16
str r2, [r0, #0x01]
strb r1, [r0, #0x07]
bx lr
LMEMCPY_8_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldrh r1, [r1, #0x06]
strb r2, [r0]
mov ip, r2, lsr #8
orr ip, ip, r3, lsl #8
mov r2, r1, lsr #8
strb r2, [r0, #0x07]
mov r1, r1, lsl #8
orr r1, r1, r3, lsr #24
str ip, [r0, #0x01]
strh r1, [r0, #0x05]
bx lr
LMEMCPY_8_PAD
ldrb r2, [r1]
ldr ip, [r1, #0x01]
ldrh r3, [r1, #0x05]
ldrb r1, [r1, #0x07]
strb r2, [r0]
str ip, [r0, #0x01]
strh r3, [r0, #0x05]
strb r1, [r0, #0x07]
bx lr
LMEMCPY_8_PAD
#define LMEMCPY_C_LOG2 7
#define LMEMCPY_C_PAD .align LMEMCPY_C_LOG2
LMEMCPY_C_PAD
.Lmemcpy_c:
and r2, r1, #0x03
orr r2, r2, r0, lsl #2
ands r2, r2, #0x0f
sub r3, pc, #0x14
addne pc, r3, r2, lsl #LMEMCPY_C_LOG2
ldr r2, [r1]
ldr r3, [r1, #0x04]
ldr r1, [r1, #0x08]
str r2, [r0]
str r3, [r0, #0x04]
str r1, [r0, #0x08]
bx lr
LMEMCPY_C_PAD
ldrb r2, [r1, #0xb]
ldr ip, [r1, #0x07]
ldr r3, [r1, #0x03]
ldr r1, [r1, #-1]
mov r2, r2, lsl #24
orr r2, r2, ip, lsr #8
str r2, [r0, #0x08]
mov r2, ip, lsl #24
orr r2, r2, r3, lsr #8
mov r1, r1, lsr #8
orr r1, r1, r3, lsl #24
str r2, [r0, #0x04]
str r1, [r0]
bx lr
LMEMCPY_C_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldr ip, [r1, #0x06]
ldrh r1, [r1, #0x0a]
orr r2, r2, r3, lsl #16
str r2, [r0]
mov r3, r3, lsr #16
orr r3, r3, ip, lsl #16
mov r1, r1, lsl #16
orr r1, r1, ip, lsr #16
str r3, [r0, #0x04]
str r1, [r0, #0x08]
bx lr
LMEMCPY_C_PAD
ldrb r2, [r1]
ldr r3, [r1, #0x01]
ldr ip, [r1, #0x05]
ldr r1, [r1, #0x09]
orr r2, r2, r3, lsl #8
str r2, [r0]
mov r3, r3, lsr #24
orr r3, r3, ip, lsl #8
mov r1, r1, lsl #8
orr r1, r1, ip, lsr #24
str r3, [r0, #0x04]
str r1, [r0, #0x08]
bx lr
LMEMCPY_C_PAD
ldr r2, [r1]
ldr r3, [r1, #0x04]
ldr ip, [r1, #0x08]
mov r1, r2, lsr #8
strh r1, [r0, #0x01]
strb r2, [r0]
mov r1, r2, lsr #24
orr r2, r1, r3, lsl #8
mov r1, r3, lsr #24
orr r1, r1, ip, lsl #8
mov ip, ip, lsr #24
str r2, [r0, #0x03]
str r1, [r0, #0x07]
strb ip, [r0, #0x0b]
bx lr
LMEMCPY_C_PAD
ldrb r2, [r1]
ldrh r3, [r1, #0x01]
ldr ip, [r1, #0x03]
strb r2, [r0]
ldr r2, [r1, #0x07]
ldrb r1, [r1, #0x0b]
strh r3, [r0, #0x01]
str ip, [r0, #0x03]
str r2, [r0, #0x07]
strb r1, [r0, #0x0b]
bx lr
LMEMCPY_C_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldr ip, [r1, #0x06]
ldrh r1, [r1, #0x0a]
strb r2, [r0]
mov r2, r2, lsr #8
orr r2, r2, r3, lsl #8
strh r2, [r0, #0x01]
mov r2, r3, lsr #8
orr r3, r2, ip, lsl #24
mov r2, ip, lsr #8
orr r2, r2, r1, lsl #24
mov r1, r1, lsr #8
str r3, [r0, #0x03]
str r2, [r0, #0x07]
strb r1, [r0, #0x0b]
bx lr
LMEMCPY_C_PAD
ldrb r2, [r1]
ldr r3, [r1, #0x01]
ldr ip, [r1, #0x05]
ldr r1, [r1, #0x09]
strb r2, [r0]
strh r3, [r0, #0x01]
mov r3, r3, lsr #16
orr r3, r3, ip, lsl #16
mov ip, ip, lsr #16
orr ip, ip, r1, lsl #16
mov r1, r1, lsr #16
str r3, [r0, #0x03]
str ip, [r0, #0x07]
strb r1, [r0, #0x0b]
bx lr
LMEMCPY_C_PAD
ldr ip, [r1]
ldr r3, [r1, #0x04]
ldr r2, [r1, #0x08]
mov r1, ip, lsr #16
strh ip, [r0]
orr r1, r1, r3, lsl #16
mov r3, r3, lsr #16
orr r3, r3, r2, lsl #16
mov r2, r2, lsr #16
str r1, [r0, #0x02]
str r3, [r0, #0x06]
strh r2, [r0, #0x0a]
bx lr
LMEMCPY_C_PAD
ldr r2, [r1, #-1]
ldr r3, [r1, #0x03]
mov ip, r2, lsr #8
strh ip, [r0]
ldr ip, [r1, #0x07]
ldrb r1, [r1, #0x0b]
mov r2, r2, lsr #24
orr r2, r2, r3, lsl #8
mov r3, r3, lsr #24
orr r3, r3, ip, lsl #8
mov r1, r1, lsl #8
orr r1, r1, ip, lsr #24
str r2, [r0, #0x02]
str r3, [r0, #0x06]
strh r1, [r0, #0x0a]
bx lr
LMEMCPY_C_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldr ip, [r1, #0x06]
ldrh r1, [r1, #0x0a]
strh r2, [r0]
str r3, [r0, #0x02]
str ip, [r0, #0x06]
strh r1, [r0, #0x0a]
bx lr
LMEMCPY_C_PAD
ldr r2, [r1, #0x09]
ldr r3, [r1, #0x05]
mov ip, r2, lsr #8
strh ip, [r0, #0x0a]
ldr ip, [r1, #0x01]
ldrb r1, [r1]
mov r2, r2, lsl #24
orr r2, r2, r3, lsr #8
mov r3, r3, lsl #24
orr r3, r3, ip, lsr #8
orr r1, r1, ip, lsl #8
str r2, [r0, #0x06]
str r3, [r0, #0x02]
strh r1, [r0]
bx lr
LMEMCPY_C_PAD
ldr r2, [r1]
ldr ip, [r1, #0x04]
ldr r1, [r1, #0x08]
strb r2, [r0]
mov r3, r2, lsr #8
orr r3, r3, ip, lsl #24
str r3, [r0, #0x01]
mov r3, ip, lsr #8
orr r3, r3, r1, lsl #24
str r3, [r0, #0x05]
mov r1, r1, lsr #8
strh r1, [r0, #0x09]
mov r1, r1, lsr #16
strb r1, [r0, #0x0b]
bx lr
LMEMCPY_C_PAD
ldrb r2, [r1, #0x0b]
ldr r3, [r1, #0x07]
ldr ip, [r1, #0x03]
ldr r1, [r1, #-1]
strb r2, [r0, #0x0b]
mov r2, r3, lsr #16
strh r2, [r0, #0x09]
mov r3, r3, lsl #16
orr r3, r3, ip, lsr #16
mov ip, ip, lsl #16
orr ip, ip, r1, lsr #16
mov r1, r1, lsr #8
str r3, [r0, #0x05]
str ip, [r0, #0x01]
strb r1, [r0]
bx lr
LMEMCPY_C_PAD
ldrh r2, [r1]
ldr r3, [r1, #0x02]
ldr ip, [r1, #0x06]
ldrh r1, [r1, #0x0a]
strb r2, [r0]
mov r2, r2, lsr #8
orr r2, r2, r3, lsl #8
mov r3, r3, lsr #24
orr r3, r3, ip, lsl #8
mov ip, ip, lsr #24
orr ip, ip, r1, lsl #8
mov r1, r1, lsr #8
str r2, [r0, #0x01]
str r3, [r0, #0x05]
strh ip, [r0, #0x09]
strb r1, [r0, #0x0b]
bx lr
LMEMCPY_C_PAD
ldrb r2, [r1]
ldr r3, [r1, #0x01]
ldr ip, [r1, #0x05]
strb r2, [r0]
ldrh r2, [r1, #0x09]
ldrb r1, [r1, #0x0b]
str r3, [r0, #0x01]
str ip, [r0, #0x05]
strh r2, [r0, #0x09]
strb r1, [r0, #0x0b]
bx lr
#endif
END(memcpy)
.section .note.GNU-stack,"",%progbits