IRO
(IRO[136].base + ((sbId) * IRO[136].m1))
#define CSTORM_STATUS_BLOCK_SIZE (IRO[136].size)
(IRO[141].base + ((sbId) * IRO[141].m1))
#define CSTORM_SYNC_BLOCK_SIZE (IRO[141].size)
(IRO[154].base + ((funcId) * IRO[154].m1))
#define TSTORM_ACCEPT_CLASSIFY_FAILED_OFFSET (IRO[208].base)
(IRO[207].base + ((pfId) * IRO[207].m1))
#define TSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[102].base)
(IRO[101].base + ((assertListEntry) * IRO[101].m1))
(IRO[205].base + ((pfId) * IRO[205].m1))
(IRO[107].base + ((funcId) * IRO[107].m1))
(IRO[278].base + ((pfId) * IRO[278].m1))
(IRO[277].base + ((pfId) * IRO[277].m1))
(IRO[276].base + ((pfId) * IRO[276].m1))
(IRO[275].base + ((pfId) * IRO[275].m1))
(IRO[274].base + ((pfId) * IRO[274].m1))
(IRO[284].base + ((pfId) * IRO[284].m1))
(IRO[270].base + ((pfId) * IRO[270].m1))
(IRO[271].base + ((pfId) * IRO[271].m1))
(IRO[272].base + ((pfId) * IRO[272].m1))
(IRO[273].base + ((pfId) * IRO[273].m1))
(IRO[206].base + ((pfId) * IRO[206].m1))
(IRO[109].base + ((funcId) * IRO[109].m1))
(IRO[223].base + ((pfId) * IRO[223].m1))
(IRO[108].base + ((funcId) * IRO[108].m1))
#define USTORM_AGG_DATA_OFFSET (IRO[212].base)
#define USTORM_AGG_DATA_SIZE (IRO[212].size)
#define USTORM_ASSERT_LIST_INDEX_OFFSET (IRO[181].base)
(IRO[180].base + ((assertListEntry) * IRO[180].m1))
(IRO[187].base + ((portId) * IRO[187].m1))
(IRO[325].base + ((pfId) * IRO[325].m1))
(IRO[182].base + ((funcId) * IRO[182].m1))
(IRO[289].base + ((pfId) * IRO[289].m1))
(IRO[290].base + ((pfId) * IRO[290].m1))
(IRO[294].base + ((pfId) * IRO[294].m1))
(IRO[291].base + ((pfId) * IRO[291].m1))
(IRO[287].base + ((pfId) * IRO[287].m1))
(IRO[286].base + ((pfId) * IRO[286].m1))
(IRO[285].base + ((pfId) * IRO[285].m1))
(IRO[288].base + ((pfId) * IRO[288].m1))
(IRO[292].base + ((pfId) * IRO[292].m1))
(IRO[293].base + ((pfId) * IRO[293].m1))
(IRO[186].base + ((pfId) * IRO[186].m1))
(IRO[184].base + ((funcId) * IRO[184].m1))
(IRO[215].base + ((portId) * IRO[215].m1) + ((clientId) * \
IRO[215].m2))
(IRO[216].base + ((qzoneId) * IRO[216].m1))
#define USTORM_TPA_BTR_OFFSET (IRO[213].base)
#define USTORM_TPA_BTR_SIZE (IRO[213].size)
(IRO[183].base + ((funcId) * IRO[183].m1))
#define XSTORM_AGG_INT_FINAL_CLEANUP_COMP_TYPE (IRO[67].base)
#define XSTORM_AGG_INT_FINAL_CLEANUP_INDEX (IRO[66].base)
#define XSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[51].base)
(IRO[50].base + ((assertListEntry) * IRO[50].m1))
(IRO[43].base + ((portId) * IRO[43].m1))
(IRO[45].base + ((pfId) * IRO[45].m1))
(IRO[47].base + ((funcId) * IRO[47].m1))
(IRO[302].base + ((pfId) * IRO[302].m1))
(IRO[305].base + ((pfId) * IRO[305].m1))
(IRO[306].base + ((pfId) * IRO[306].m1))
(IRO[307].base + ((pfId) * IRO[307].m1))
(IRO[308].base + ((pfId) * IRO[308].m1))
(IRO[309].base + ((pfId) * IRO[309].m1))
(IRO[310].base + ((pfId) * IRO[310].m1))
(IRO[311].base + ((pfId) * IRO[311].m1))
(IRO[301].base + ((pfId) * IRO[301].m1))
(IRO[300].base + ((pfId) * IRO[300].m1))
(IRO[299].base + ((pfId) * IRO[299].m1))
(IRO[304].base + ((pfId) * IRO[304].m1))
(IRO[303].base + ((pfId) * IRO[303].m1))
(IRO[298].base + ((pfId) * IRO[298].m1))
(IRO[297].base + ((pfId) * IRO[297].m1))
(IRO[296].base + ((pfId) * IRO[296].m1))
(IRO[295].base + ((pfId) * IRO[295].m1))
(IRO[44].base + ((pfId) * IRO[44].m1))
(IRO[49].base + ((funcId) * IRO[49].m1))
(IRO[32].base + ((funcId) * IRO[32].m1))
#define XSTORM_SPQ_DATA_SIZE (IRO[32].size)
(IRO[30].base + ((funcId) * IRO[30].m1))
(IRO[31].base + ((funcId) * IRO[31].m1))
(IRO[217].base + ((portId) * IRO[217].m1))
(IRO[218].base + ((portId) * IRO[218].m1))
(IRO[220].base + (((pfId)>>1) * IRO[220].m1) + (((pfId)&1) * \
IRO[220].m2))
(IRO[48].base + ((funcId) * IRO[48].m1))
#define COMMON_ASM_INVALID_ASSERT_OPCODE (IRO[7].base)
#define CSTORM_ASSERT_LIST_INDEX_OFFSET (IRO[152].base)
(IRO[151].base + ((assertListEntry) * IRO[151].m1))
(IRO[157].base + (((pfId)>>1) * IRO[157].m1) + (((pfId)&1) * \
IRO[157].m2))
(IRO[158].base + (((pfId)>>1) * IRO[158].m1) + (((pfId)&1) * \
IRO[158].m2))
(IRO[163].base + ((funcId) * IRO[163].m1))
(IRO[153].base + ((funcId) * IRO[153].m1))
(IRO[143].base + ((hcIndex) * IRO[143].m1) + ((sbId) * IRO[143].m2))
(IRO[142].base + (((hcIndex)>>2) * IRO[142].m1) + (((hcIndex)&3) \
* IRO[142].m2) + ((sbId) * IRO[142].m3))
#define CSTORM_IGU_MODE_OFFSET (IRO[161].base)
(IRO[323].base + ((pfId) * IRO[323].m1))
(IRO[324].base + ((pfId) * IRO[324].m1))
(IRO[316].base + ((pfId) * IRO[316].m1) + ((iscsiEqId) * IRO[316].m2))
(IRO[318].base + ((pfId) * IRO[318].m1) + ((iscsiEqId) * IRO[318].m2))
(IRO[317].base + ((pfId) * IRO[317].m1) + ((iscsiEqId) * IRO[317].m2))
(IRO[319].base + ((pfId) * IRO[319].m1) + ((iscsiEqId) * IRO[319].m2))
(IRO[315].base + ((pfId) * IRO[315].m1) + ((iscsiEqId) * IRO[315].m2))
(IRO[321].base + ((pfId) * IRO[321].m1) + ((iscsiEqId) * IRO[321].m2))
(IRO[320].base + ((pfId) * IRO[320].m1) + ((iscsiEqId) * IRO[320].m2))
(IRO[322].base + ((pfId) * IRO[322].m1))
(IRO[314].base + ((pfId) * IRO[314].m1))
(IRO[313].base + ((pfId) * IRO[313].m1))
(IRO[312].base + ((pfId) * IRO[312].m1))
(IRO[155].base + ((funcId) * IRO[155].m1))
(IRO[146].base + ((pfId) * IRO[146].m1))
(IRO[147].base + ((pfId) * IRO[147].m1))
(IRO[145].base + ((pfId) * IRO[145].m1))
#define CSTORM_SP_STATUS_BLOCK_SIZE (IRO[145].size)
(IRO[148].base + ((pfId) * IRO[148].m1))
#define CSTORM_SP_SYNC_BLOCK_SIZE (IRO[148].size)
(IRO[140].base + ((sbId) * IRO[140].m1) + ((hcIndex) * IRO[140].m2))
(IRO[137].base + ((sbId) * IRO[137].m1))
(IRO[138].base + ((sbId) * IRO[138].m1))
(IRO[139].base + ((sbId) * IRO[139].m1) + ((hcIndex) * IRO[139].m2))
#define MSTORM_ETH_PF_STAT_SIZE (IRO[22].size)
#define USTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[23].base + ((stat_counter_id) * IRO[23].m1))
#define USTORM_QUEUE_STAT_SIZE (IRO[23].size)
#define USTORM_ETH_PF_STAT_OFFSET(pf_id) (IRO[24].base + ((pf_id) * IRO[24].m1))
#define USTORM_ETH_PF_STAT_SIZE (IRO[24].size)
#define PSTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[25].base + ((stat_counter_id) * IRO[25].m1))
#define PSTORM_QUEUE_STAT_SIZE (IRO[25].size)
#define PSTORM_ETH_PF_STAT_OFFSET(pf_id) (IRO[26].base + ((pf_id) * IRO[26].m1))
#define PSTORM_ETH_PF_STAT_SIZE (IRO[26].size)
#define PSTORM_CTL_FRAME_ETHTYPE_OFFSET(ethType_id) (IRO[27].base + ((ethType_id) * IRO[27].m1))
#define PSTORM_CTL_FRAME_ETHTYPE_SIZE (IRO[27].size)
#define TSTORM_ETH_PRS_INPUT_OFFSET (IRO[28].base)
#define TSTORM_ETH_PRS_INPUT_SIZE (IRO[28].size)
#define ETH_RX_RATE_LIMIT_OFFSET(pf_id) (IRO[29].base + ((pf_id) * IRO[29].m1))
#define ETH_RX_RATE_LIMIT_SIZE (IRO[29].size)
#define XSTORM_ETH_QUEUE_ZONE_OFFSET(queue_id) (IRO[30].base + ((queue_id) * IRO[30].m1))
#define XSTORM_ETH_QUEUE_ZONE_SIZE (IRO[30].size)
#define YSTORM_TOE_CQ_PROD_OFFSET(rss_id) (IRO[31].base + ((rss_id) * IRO[31].m1))
#define YSTORM_TOE_CQ_PROD_SIZE (IRO[31].size)
#define USTORM_TOE_CQ_PROD_OFFSET(rss_id) (IRO[32].base + ((rss_id) * IRO[32].m1))
#define USTORM_TOE_CQ_PROD_SIZE (IRO[32].size)
#define USTORM_TOE_GRQ_PROD_OFFSET(pf_id) (IRO[33].base + ((pf_id) * IRO[33].m1))
#define USTORM_TOE_GRQ_PROD_SIZE (IRO[33].size)
#define TSTORM_SCSI_CMDQ_CONS_OFFSET(cmdq_queue_id) (IRO[34].base + ((cmdq_queue_id) * IRO[34].m1))
#define TSTORM_SCSI_CMDQ_CONS_SIZE (IRO[34].size)
#define TSTORM_SCSI_BDQ_EXT_PROD_OFFSET(func_id,bdq_id) (IRO[35].base + ((func_id) * IRO[35].m1) + ((bdq_id) * IRO[35].m2))
#define TSTORM_SCSI_BDQ_EXT_PROD_SIZE (IRO[35].size)
#define MSTORM_SCSI_BDQ_EXT_PROD_OFFSET(func_id,bdq_id) (IRO[36].base + ((func_id) * IRO[36].m1) + ((bdq_id) * IRO[36].m2))
#define MSTORM_SCSI_BDQ_EXT_PROD_SIZE (IRO[36].size)
#define TSTORM_ISCSI_RX_STATS_OFFSET(pf_id) (IRO[37].base + ((pf_id) * IRO[37].m1))
#define TSTORM_ISCSI_RX_STATS_SIZE (IRO[37].size)
#define MSTORM_ISCSI_RX_STATS_OFFSET(pf_id) (IRO[38].base + ((pf_id) * IRO[38].m1))
#define MSTORM_ISCSI_RX_STATS_SIZE (IRO[38].size)
#define USTORM_ISCSI_RX_STATS_OFFSET(pf_id) (IRO[39].base + ((pf_id) * IRO[39].m1))
#define USTORM_ISCSI_RX_STATS_SIZE (IRO[39].size)
#define XSTORM_ISCSI_TX_STATS_OFFSET(pf_id) (IRO[40].base + ((pf_id) * IRO[40].m1))
#define XSTORM_ISCSI_TX_STATS_SIZE (IRO[40].size)
#define YSTORM_ISCSI_TX_STATS_OFFSET(pf_id) (IRO[41].base + ((pf_id) * IRO[41].m1))
#define YSTORM_ISCSI_TX_STATS_SIZE (IRO[41].size)
#define PSTORM_ISCSI_TX_STATS_OFFSET(pf_id) (IRO[42].base + ((pf_id) * IRO[42].m1))
#define PSTORM_ISCSI_TX_STATS_SIZE (IRO[42].size)
#define TSTORM_FCOE_RX_STATS_OFFSET(pf_id) (IRO[43].base + ((pf_id) * IRO[43].m1))
#define TSTORM_FCOE_RX_STATS_SIZE (IRO[43].size)
#define PSTORM_FCOE_TX_STATS_OFFSET(pf_id) (IRO[44].base + ((pf_id) * IRO[44].m1))
#define PSTORM_FCOE_TX_STATS_SIZE (IRO[44].size)
#define PSTORM_RDMA_QUEUE_STAT_OFFSET(rdma_stat_counter_id) (IRO[45].base + ((rdma_stat_counter_id) * IRO[45].m1))
#define PSTORM_RDMA_QUEUE_STAT_SIZE (IRO[45].size)
#define TSTORM_RDMA_QUEUE_STAT_OFFSET(rdma_stat_counter_id) (IRO[46].base + ((rdma_stat_counter_id) * IRO[46].m1))
#define TSTORM_RDMA_QUEUE_STAT_SIZE (IRO[46].size)
#define XSTORM_IWARP_RXMIT_STATS_OFFSET(pf_id) (IRO[47].base + ((pf_id) * IRO[47].m1))
#define XSTORM_IWARP_RXMIT_STATS_SIZE (IRO[47].size)
#define TSTORM_ROCE_EVENTS_STAT_OFFSET(roce_pf_id) (IRO[48].base + ((roce_pf_id) * IRO[48].m1))
#define TSTORM_ROCE_EVENTS_STAT_SIZE (IRO[48].size)
#define YSTORM_ROCE_DCQCN_RECEIVED_STATS_OFFSET(roce_pf_id) (IRO[49].base + ((roce_pf_id) * IRO[49].m1))
#define YSTORM_ROCE_DCQCN_RECEIVED_STATS_SIZE (IRO[49].size)
#define PSTORM_ROCE_DCQCN_SENT_STATS_OFFSET(roce_pf_id) (IRO[50].base + ((roce_pf_id) * IRO[50].m1))
#define PSTORM_ROCE_DCQCN_SENT_STATS_SIZE (IRO[50].size)
#define YSTORM_FLOW_CONTROL_MODE_OFFSET (IRO[0].base)
#define YSTORM_FLOW_CONTROL_MODE_SIZE (IRO[0].size)
#define TSTORM_PORT_STAT_OFFSET(port_id) (IRO[1].base + ((port_id) * IRO[1].m1))
#define TSTORM_PORT_STAT_SIZE (IRO[1].size)
#define TSTORM_LL2_PORT_STAT_OFFSET(port_id) (IRO[2].base + ((port_id) * IRO[2].m1))
#define TSTORM_LL2_PORT_STAT_SIZE (IRO[2].size)
#define USTORM_VF_PF_CHANNEL_READY_OFFSET(vf_id) (IRO[3].base + ((vf_id) * IRO[3].m1))
#define USTORM_VF_PF_CHANNEL_READY_SIZE (IRO[3].size)
#define USTORM_FLR_FINAL_ACK_OFFSET(pf_id) (IRO[4].base + ((pf_id) * IRO[4].m1))
#define USTORM_FLR_FINAL_ACK_SIZE (IRO[4].size)
#define USTORM_EQE_CONS_OFFSET(pf_id) (IRO[5].base + ((pf_id) * IRO[5].m1))
#define USTORM_EQE_CONS_SIZE (IRO[5].size)
#define USTORM_ETH_QUEUE_ZONE_OFFSET(queue_zone_id) (IRO[6].base + ((queue_zone_id) * IRO[6].m1))
#define USTORM_ETH_QUEUE_ZONE_SIZE (IRO[6].size)
#define USTORM_COMMON_QUEUE_CONS_OFFSET(queue_zone_id) (IRO[7].base + ((queue_zone_id) * IRO[7].m1))
#define USTORM_COMMON_QUEUE_CONS_SIZE (IRO[7].size)
#define XSTORM_INTEG_TEST_DATA_OFFSET (IRO[8].base)
#define XSTORM_INTEG_TEST_DATA_SIZE (IRO[8].size)
#define YSTORM_INTEG_TEST_DATA_OFFSET (IRO[9].base)
#define YSTORM_INTEG_TEST_DATA_SIZE (IRO[9].size)
#define PSTORM_INTEG_TEST_DATA_OFFSET (IRO[10].base)
#define PSTORM_INTEG_TEST_DATA_SIZE (IRO[10].size)
#define TSTORM_INTEG_TEST_DATA_OFFSET (IRO[11].base)
#define TSTORM_INTEG_TEST_DATA_SIZE (IRO[11].size)
#define MSTORM_INTEG_TEST_DATA_OFFSET (IRO[12].base)
#define MSTORM_INTEG_TEST_DATA_SIZE (IRO[12].size)
#define USTORM_INTEG_TEST_DATA_OFFSET (IRO[13].base)
#define USTORM_INTEG_TEST_DATA_SIZE (IRO[13].size)
#define TSTORM_LL2_RX_PRODS_OFFSET(core_rx_queue_id) (IRO[14].base + ((core_rx_queue_id) * IRO[14].m1))
#define TSTORM_LL2_RX_PRODS_SIZE (IRO[14].size)
#define CORE_LL2_TSTORM_PER_QUEUE_STAT_OFFSET(core_rx_queue_id) (IRO[15].base + ((core_rx_queue_id) * IRO[15].m1))
#define CORE_LL2_TSTORM_PER_QUEUE_STAT_SIZE (IRO[15].size)
#define CORE_LL2_USTORM_PER_QUEUE_STAT_OFFSET(core_rx_queue_id) (IRO[16].base + ((core_rx_queue_id) * IRO[16].m1))
#define CORE_LL2_USTORM_PER_QUEUE_STAT_SIZE (IRO[16].size)
#define CORE_LL2_PSTORM_PER_QUEUE_STAT_OFFSET(core_tx_stats_id) (IRO[17].base + ((core_tx_stats_id) * IRO[17].m1))
#define CORE_LL2_PSTORM_PER_QUEUE_STAT_SIZE (IRO[17].size)
#define MSTORM_QUEUE_STAT_OFFSET(stat_counter_id) (IRO[18].base + ((stat_counter_id) * IRO[18].m1))
#define MSTORM_QUEUE_STAT_SIZE (IRO[18].size)
#define MSTORM_ETH_PF_PRODS_OFFSET(queue_id) (IRO[19].base + ((queue_id) * IRO[19].m1))
#define MSTORM_ETH_PF_PRODS_SIZE (IRO[19].size)
#define MSTORM_ETH_VF_PRODS_OFFSET(vf_id,vf_queue_id) (IRO[20].base + ((vf_id) * IRO[20].m1) + ((vf_queue_id) * IRO[20].m2))
#define MSTORM_ETH_VF_PRODS_SIZE (IRO[20].size)
#define MSTORM_TPA_TIMEOUT_US_OFFSET (IRO[21].base)
#define MSTORM_TPA_TIMEOUT_US_SIZE (IRO[21].size)
#define MSTORM_ETH_PF_STAT_OFFSET(pf_id) (IRO[22].base + ((pf_id) * IRO[22].m1))