ICE_DBG_PHY
ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_low: 0x%016llx\n", prefix,
ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n",
ice_debug(hw, ICE_DBG_PHY, "%s: phy_type_high: 0x%016llx\n", prefix,
ice_debug(hw, ICE_DBG_PHY, "%s: bit(%d): %s\n",
ice_debug(hw, ICE_DBG_PHY, "Invalid bit is set in ice_aqc_set_phy_cfg_data->caps : 0x%x\n",
ice_debug(hw, ICE_DBG_PHY, "options: %x\n", *option_count);
ice_debug(hw, ICE_DBG_PHY, "active idx: %x\n",
ice_debug(hw, ICE_DBG_PHY, "pending idx: %x\n",
ice_debug(hw, ICE_DBG_PHY, "pmds: %x max speed: %x\n",
ice_debug(hw, ICE_DBG_PHY, "Port split read err: %d\n", status);
ice_debug(hw, ICE_DBG_PHY, "Active idx: %d\n", active_idx);
ice_debug(hw, ICE_DBG_PHY, "No valid Active option\n");
ice_debug(hw, ICE_DBG_PHY, "%s: Port Topology (lport %d):\n",
ice_debug(hw, ICE_DBG_PHY, "serdes lane count %d\n",
ice_debug(hw, ICE_DBG_PHY, "pcs quad select %d\n",
ice_debug(hw, ICE_DBG_PHY, "pcs port %d\n",
ice_debug(hw, ICE_DBG_PHY, "primary serdes lane %d\n",