ICE_DBG_NVM
ice_debug(hw, ICE_DBG_NVM,
ice_debug(hw, ICE_DBG_NVM, "Unable to read Option ROM data\n");
ice_debug(hw, ICE_DBG_NVM, "Found CIVD section at offset %u\n",
ice_debug(hw, ICE_DBG_NVM, "Unable to read CIVD data\n");
ice_debug(hw, ICE_DBG_NVM, "Found CIVD data with invalid checksum of %u\n",
ice_debug(hw, ICE_DBG_NVM, "Unable to locate CIVD data within the Option ROM\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to locate valid Option ROM CIVD data\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read Option ROM security revision.\n");
ice_debug(hw, ICE_DBG_NVM, "NVM error: requested data is beyond Shadow RAM limit\n");
ice_debug(hw, ICE_DBG_NVM, "Expected netlist module_id ID of 0x%04x, but got 0x%04x\n",
ice_debug(hw, ICE_DBG_NVM, "Netlist Link Topology module too small. Expected at least %u words, but got %u words.\n",
ice_debug(hw, ICE_DBG_NVM, "%s: New upper bound of %u bytes\n",
ice_debug(hw, ICE_DBG_NVM, "%s: New lower bound of %u bytes\n",
ice_debug(hw, ICE_DBG_NVM, "Predicted flash size is %u bytes\n", max_size);
ice_debug(hw, ICE_DBG_NVM, "Failed to read the Shadow RAM control word\n");
ice_debug(hw, ICE_DBG_NVM, "Shadow RAM control word is invalid\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank pointer\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM bank area size\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank pointer\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read OROM bank area size\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank pointer\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read Netlist bank area size\n");
ice_debug(hw, ICE_DBG_NVM, "NVM init error: unsupported blank mode.\n");
ice_debug(hw, ICE_DBG_NVM, "NVM init error: failed to discover flash size.\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to determine active flash banks.\n");
ice_debug(hw, ICE_DBG_NVM, "At least one of NVM and OROM MinSrev must be valid");
ice_debug(hw, ICE_DBG_NVM, "NVM access: reading register %08x\n",
ice_debug(hw, ICE_DBG_NVM, "NVM access: writing register %08x with value %08x\n",
ice_debug(hw, ICE_DBG_NVM, "NVM error: offset beyond SR lmt.\n");
ice_debug(hw, ICE_DBG_NVM, "NVM error: tried to access %d words, limit is %d.\n",
ice_debug(hw, ICE_DBG_NVM, "NVM error: cannot spread over two sectors.\n");
ice_debug(hw, ICE_DBG_NVM, "Unexpected value for flash module: 0x%04x\n", module);
ice_debug(hw, ICE_DBG_NVM, "Unexpected value for active flash bank: %u\n",
ice_debug(hw, ICE_DBG_NVM, "Unexpected value for flash bank selection: %u\n", bank);
ice_debug(hw, ICE_DBG_NVM, "Unable to calculate flash bank offset for module 0x%04x\n",
ice_debug(hw, ICE_DBG_NVM, "Failed to read DEV starter version.\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK lo.\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read EETRACK hi.\n");
ice_debug(hw, ICE_DBG_NVM, "Failed to read NVM security revision.\n");
ice_debug(hw, ICE_DBG_NVM, "Unexpected Option ROM Size of %u\n",
ice_debug(hw, ICE_DBG_NVM, "Failed to get VLAN mode, status %d\n",