Symbol: ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR
sys/dev/arcmsr/arcmsr.c
2128
} while(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR);
sys/dev/arcmsr/arcmsr.c
2325
(ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR |
sys/dev/arcmsr/arcmsr.c
2337
if(host_interrupt_status & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) {
sys/dev/arcmsr/arcmsr.c
2341
} while (host_interrupt_status & (ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR | ARCMSR_HBCMU_OUTBOUND_DOORBELL_ISR));
sys/dev/arcmsr/arcmsr.c
3585
if(!(CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR)) {
sys/dev/arcmsr/arcmsr.c
928
while((CHIP_REG_READ32(HBC_MessageUnit, 0, host_int_status) & ARCMSR_HBCMU_OUTBOUND_POSTQUEUE_ISR) && (i++ < ARCMSR_MAX_OUTSTANDING_CMD)) {