sys/arm/nvidia/tegra_i2c.c

332

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, 0);

sys/arm/nvidia/tegra_i2c.c

420

reg = RD4(sc, I2C_INTERRUPT_MASK_REGISTER);

sys/arm/nvidia/tegra_i2c.c

423

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, 0);

sys/arm/nvidia/tegra_i2c.c

442

reg = RD4(sc, I2C_INTERRUPT_MASK_REGISTER);

sys/arm/nvidia/tegra_i2c.c

444

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, reg);

sys/arm/nvidia/tegra_i2c.c

450

reg = RD4(sc, I2C_INTERRUPT_MASK_REGISTER);

sys/arm/nvidia/tegra_i2c.c

452

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, reg);

sys/arm/nvidia/tegra_i2c.c

458

reg = RD4(sc, I2C_INTERRUPT_MASK_REGISTER);

sys/arm/nvidia/tegra_i2c.c

461

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, reg);

sys/arm/nvidia/tegra_i2c.c

467

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, 0);

sys/arm/nvidia/tegra_i2c.c

510

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, mask);

sys/arm/nvidia/tegra_i2c.c

578

WR4(sc, I2C_INTERRUPT_MASK_REGISTER, 0);