sys/dev/iicbus/controller/vybrid/vf_i2c.c

306

reg = READ1(sc, I2C_IBCR);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

308

WRITE1(sc, I2C_IBCR, reg);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

346

WRITE1(sc, I2C_IBCR, IBCR_MDIS);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

348

WRITE1(sc, I2C_IBCR, IBCR_NOACK);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

360

WRITE1(sc, I2C_IBCR, reg);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

394

if ((READ1(sc, I2C_IBCR) & IBCR_MSSL) != 0)

sys/dev/iicbus/controller/vybrid/vf_i2c.c

395

WRITE1(sc, I2C_IBCR, IBCR_NOACK | IBCR_IBIE);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

452

WRITE1(sc, I2C_IBCR, IBCR_MDIS);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

457

WRITE1(sc, I2C_IBCR, 0x0); /* Enable i2c */

sys/dev/iicbus/controller/vybrid/vf_i2c.c

480

WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL | IBCR_NOACK);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

482

WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

497

WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_MSSL | IBCR_NOACK);

sys/dev/iicbus/controller/vybrid/vf_i2c.c

501

WRITE1(sc, I2C_IBCR, IBCR_IBIE | IBCR_NOACK);