sys/dev/etherswitch/ar40xx/ar40xx_hw_mirror.c

113

AR40XX_REG_PORT_LOOKUP(sc->sc_monitor.source_port));

sys/dev/etherswitch/ar40xx/ar40xx_hw_mirror.c

116

AR40XX_REG_PORT_LOOKUP(sc->sc_monitor.source_port),

sys/dev/etherswitch/ar40xx/ar40xx_hw_mirror.c

87

reg = AR40XX_REG_READ(sc, AR40XX_REG_PORT_LOOKUP(port));

sys/dev/etherswitch/ar40xx/ar40xx_hw_mirror.c

89

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_LOOKUP(port), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

119

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_LOOKUP(port), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_port.c

283

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_LOOKUP(port), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

351

AR40XX_REG_PORT_LOOKUP(phy + 1));

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

354

AR40XX_REG_PORT_LOOKUP(phy + 1), reg);

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

400

reg = AR40XX_REG_READ(sc, AR40XX_REG_PORT_LOOKUP(phy + 1));

sys/dev/etherswitch/ar40xx/ar40xx_hw_psgmii.c

402

AR40XX_REG_WRITE(sc, AR40XX_REG_PORT_LOOKUP(phy + 1), reg);

sys/dev/etherswitch/ar40xx/ar40xx_main.c

191

AR40XX_REG_READ(sc, AR40XX_REG_PORT_LOOKUP(val)));