GET_HW_DATA
#define GET_MAX_BANKS(accel_dev) (GET_HW_DATA(accel_dev)->num_banks)
(GET_HW_DATA(accel_dev)->num_rings_per_bank)
#define GET_MAX_ACCELENGINES(accel_dev) (GET_HW_DATA(accel_dev)->num_engines)
(GET_HW_DATA(accel_dev)->num_rings_per_bank)
u16 ring_to_svc_map = GET_HW_DATA(accel_dev)->ring_to_svc_map;
u16 ena_srv_mask = GET_HW_DATA(accel_dev)->ring_to_svc_map;
if (!(GET_HW_DATA(accel_dev)->ae_mask & (1ULL << engine)))
u32 hw_caps = GET_HW_DATA(accel_dev)->accel_capabilities_mask;
struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);
struct adf_hw_device_data *hw_data = GET_HW_DATA(accel_dev);
if (GET_HW_DATA(accel_dev)->query_storage_cap) {
ret = GET_HW_DATA(accel_dev)->get_storage_enabled(
#define ADF_UIO_GET_NAME(accel_dev) (GET_HW_DATA(accel_dev)->dev_class->name)
#define ADF_UIO_GET_TYPE(accel_dev) (GET_HW_DATA(accel_dev)->dev_class->type)
(GET_HW_DATA(accel_dev)->get_etr_bar_id(GET_HW_DATA(accel_dev)))
u32 capabilities = GET_HW_DATA(accel_dev)->accel_capabilities_mask;
GET_HW_DATA(accel_dev)->extended_dc_capabilities =