Symbol: GICR_ISENABLER0
sys/arm64/arm64/gic_v3.c
1500
gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICR_ISENABLER0,
sys/arm64/vmm/io/vgic_v3.c
397
VGIC_REGISTER(GICR_ISENABLER0, 4, VGIC_32_BIT, redist_ienabler0_read,