sys/arm/arm/gic.c

1217

(gic_d_read_4(sc, GICD_IPRIORITYR(i)) >> 8 * (i & 0x3)) &

sys/arm/arm/gic.c

216

gic_d_write_4(sc, GICD_IPRIORITYR(irq), 0);

sys/arm/arm/gic.c

390

gic_d_write_4(sc, GICD_IPRIORITYR(i), 0);

sys/arm64/arm64/gic_v3.c

1341

gic_d_write(sc, 4, GICD_IPRIORITYR(i), GIC_PRIORITY_MAX);

sys/arm64/arm64/gic_v3.c

1505

gic_r_write(sc, 4, GICR_SGI_BASE_SIZE + GICD_IPRIORITYR(i),

sys/arm64/vmm/io/vgic_v3.c

1241

n = (reg - GICD_IPRIORITYR(0)) / 4;

sys/arm64/vmm/io/vgic_v3.c

1253

irq_base = (reg - GICD_IPRIORITYR(0)) + offset;

sys/arm64/vmm/io/vgic_v3.c

291

VGIC_REGISTER_RANGE_RAZ_WI(GICD_IPRIORITYR(0), GICD_IPRIORITYR(32), 4,

sys/arm64/vmm/io/vgic_v3.c

293

VGIC_REGISTER_RANGE(GICD_IPRIORITYR(32), GICD_IPRIORITYR(1024), 4,