GEN_SPC_REG_RESET
{ GEN_SPC_REG_RESET, PCIBAR2, SPC_REG_RESET, SIZE_DW }, /* 0x0d */
{ GEN_SPC_REG_RESET, PCIBAR0, V_SoftResetRegister, SIZE_DW }, /* 0x0d */
#define SPC_READ_RESET_REG siHalRegReadExt(agRoot, GEN_SPC_REG_RESET, SPC_REG_RESET)