GENMASK
#define ENETC_TBMR_PRIO_MASK GENMASK(2, 0)
#define ENETC_PMR_EN GENMASK(18, 16)
#define ENETC_PMR_PSPEED_MASK GENMASK(11, 8)
#define ENETC_CBS_BW_MASK GENMASK(6, 0)
#define ENETC_PM0_IFM_SSP_MASK GENMASK(14, 13)
#define ENETC_PM0_IFM_IFMODE_MASK GENMASK(1, 0)
#define ENETC_PSIDCAPR_MSK GENMASK(15, 0)
#define ENETC_PSFCAPR_MSK GENMASK(15, 0)
#define ENETC_PSGCAPR_GCL_MSK GENMASK(18, 16)
#define ENETC_PSGCAPR_SGIT_MSK GENMASK(15, 0)
#define ENETC_PFMCAPR_MSK GENMASK(15, 0)
#define ENETC_TXBD_TXSTART_MASK GENMASK(24, 0)
#define ENETC_RXBD_FLAG_TPID GENMASK(1, 0)
#define ENETC_PSIMSGRR_MR_MASK GENMASK(2, 1)
#define ENETC_CBDR_FMI_IRFPP_MASK GENMASK(4, 0)
#define ENETC_QBV_MAX_GCL_LEN_MASK GENMASK(15, 0)
#define ENETC_PSIIER_MR_MASK GENMASK(2, 1)
#define IB_QP_ATTR_STANDARD_BITS GENMASK(20, 0)
#define IRDMA_WQEALLOC_WQE_DESC_INDEX GENMASK(31, 20)
#define IRDMA_CQPTAIL_WQTAIL GENMASK(10, 0)
#define IRDMA_CQPERRCODES_CQP_MINOR_CODE GENMASK(15, 0)
#define IRDMA_CQPERRCODES_CQP_MAJOR_CODE GENMASK(31, 16)
#define IRDMA_GLPCI_LBARCTRL_PE_DB_SIZE GENMASK(5, 4)
#define IRDMA_GLINT_RATE_INTERVAL GENMASK(4, 0)
#define IRDMA_GLINT_DYN_CTL_ITR_INDX GENMASK(4, 3)
#define IRDMA_GLINT_DYN_CTL_INTERVAL GENMASK(16, 5)
#define IRDMA_GLINT_CEQCTL_ITR_INDX GENMASK(12, 11)
#define IRDMA_GLINT_CEQCTL_MSIX_INDX GENMASK(10, 0)
#define IRDMA_PFINT_AEQCTL_MSIX_INDX GENMASK(10, 0)
#define IRDMA_PFINT_AEQCTL_ITR_INDX GENMASK(12, 11)
#define IRDMA_PFHMC_PDINV_PMSDIDX GENMASK(11, 0)
#define IRDMA_PFHMC_PDINV_PMPDIDX GENMASK(24, 16)
#define IRDMA_PFHMC_SDDATALOW_PMSDBPCOUNT GENMASK(11, 2)
#define IRDMA_PFHMC_SDDATALOW_PMSDDATALOW GENMASK(31, 12)
#define IRDMA_DSCP GENMASK(7, 2)
#define IRDMAQPC_GEN1_SRCMACADDRIDX GENMASK(21, 16)
#ifndef GENMASK
#define IRDMA_CQPSQ_CQ_SHADOW_READ_THRESHOLD GENMASK(17, 0)
#define ADF_PF2VF_VERSION_RESP_VERS_MASK GENMASK(7, 0)
#define ADF_PF2VF_VERSION_RESP_RESULT_MASK GENMASK(9, 8)
#define ADF_VF2PF_RNG_RESET_RP_MASK GENMASK(1, 0)
#define ADF_VF2PF_RNG_RESET_RSVD_MASK GENMASK(25, 2)
#define ADF_PF2VF_BLKMSG_RESP_TYPE_MASK GENMASK(1, 0)
#define ADF_PF2VF_BLKMSG_RESP_DATA_MASK GENMASK(9, 2)
#define ADF_VF2PF_LARGE_BLOCK_TYPE_MASK GENMASK(1, 0)
#define ADF_VF2PF_LARGE_BLOCK_BYTE_MASK GENMASK(8, 2)
#define ADF_VF2PF_MEDIUM_BLOCK_TYPE_MASK GENMASK(2, 0)
#define ADF_VF2PF_MEDIUM_BLOCK_BYTE_MASK GENMASK(8, 3)
#define ADF_VF2PF_SMALL_BLOCK_TYPE_MASK GENMASK(3, 0)
#define ADF_VF2PF_SMALL_BLOCK_BYTE_MASK GENMASK(8, 4)
#define TX_RING_CI_MASK GENMASK(15, 0)
#define RX_RING_CI_MASK GENMASK(15, 0)
#define TX_TABLE_INTERVAL_MASK GENMASK(23,0) /* Isoch interval 256ns */
#define TB_CFG_ADPT_MASK GENMASK(5,0)
#define ROUTER_CS1_NEXT_CAP_MASK GENMASK(7,0)
#define ROUTER_CS1_UPSTREAM_MASK GENMASK(13,8)
#define ROUTER_CS1_MAX_MASK GENMASK(19,14)
#define ROUTER_CS1_DEPTH_MASK GENMASK(22,20)
#define ROUTER_CS1_REVISION_MASK GENMASK(31,24)
#define TB_LC_DESC_NUM_LC_MASK GENMASK(3, 0)
#define TB_LC_DESC_SIZE_MASK GENMASK(15, 8)
#define TB_LC_DESC_PORT_MASK GENMASK(27, 16)
#define ADP_CS1_NEXT_CAP_MASK GENMASK(7,0)
#define ADP_CS1_COUNTER_MASK GENMASK(18,8)
#define ADP_CS2_TYPE_MASK GENMASK(23,0)
#define ADP_CS3_ADP_NUM_MASK GENMASK(25,20)
#define CAP_LANE_LINK_MASK GENMASK(3,0)
#define CAP_LANE_WIDTH_MASK GENMASK(9,4)
#define CAP_LANE_STATE_MASK GENMASK(13,10)
#define CAP_LANE_LLE_MASK GENMASK(6,0)
#define TB_CFG_ADDR_MASK GENMASK(12,0)
#define TB_CFG_SIZE_MASK GENMASK(18,13)
#define TB_CFG_ADAPTER_MASK GENMASK(24,19)
#define TB_CFG_EVENT_MASK GENMASK(7,0)
#define TB_CFG_EVENT_ADAPTER_MASK GENMASK(13,8)
UVERBS_API_ATTR_KEY_MASK = GENMASK(UVERBS_API_ATTR_KEY_BITS - 1, 0),
UVERBS_API_METHOD_KEY_MASK = GENMASK(
UVERBS_API_OBJ_KEY_MASK = GENMASK(31, UVERBS_API_OBJ_KEY_SHIFT),