sys/riscv/sifive/fu740_pci_dw.c

116

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ADDR), reg);

sys/riscv/sifive/fu740_pci_dw.c

117

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, READ_EN), 1);

sys/riscv/sifive/fu740_pci_dw.c

133

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, READ_EN), 0);

sys/riscv/sifive/fu740_pci_dw.c

157

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ADDR), reg);

sys/riscv/sifive/fu740_pci_dw.c

158

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_DATA), val);

sys/riscv/sifive/fu740_pci_dw.c

159

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_EN), 1);

sys/riscv/sifive/fu740_pci_dw.c

174

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_EN), 0);

sys/riscv/sifive/fu740_pci_dw.c

209

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PERST_N, 0);

sys/riscv/sifive/fu740_pci_dw.c

234

FUDW_MGMT_WRITE(sc, FUDW_MGMT_HOLD_PHY_RST, 1);

sys/riscv/sifive/fu740_pci_dw.c

245

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, SEL), 1);

sys/riscv/sifive/fu740_pci_dw.c

265

FUDW_MGMT_WRITE(sc, FUDW_MGMT_HOLD_PHY_RST, 0);

sys/riscv/sifive/fu740_pci_dw.c

275

FUDW_MGMT_WRITE(sc, FUDW_MGMT_DEVICE_TYPE, FUDW_MGMT_DEVICE_TYPE_RC);

sys/riscv/sifive/fu740_pci_dw.c

281

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PERST_N, 1);

sys/riscv/sifive/fu740_pci_dw.c

309

FUDW_MGMT_WRITE(sc, FUDW_MGMT_LTSSM_EN, 1);