sys/riscv/sifive/fu740_pci_dw.c

116

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ADDR), reg);

sys/riscv/sifive/fu740_pci_dw.c

117

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, READ_EN), 1);

sys/riscv/sifive/fu740_pci_dw.c

121

ack = FUDW_MGMT_READ(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ACK));

sys/riscv/sifive/fu740_pci_dw.c

132

*val = FUDW_MGMT_READ(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, READ_DATA));

sys/riscv/sifive/fu740_pci_dw.c

133

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, READ_EN), 0);

sys/riscv/sifive/fu740_pci_dw.c

137

ack = FUDW_MGMT_READ(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ACK));

sys/riscv/sifive/fu740_pci_dw.c

157

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ADDR), reg);

sys/riscv/sifive/fu740_pci_dw.c

158

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_DATA), val);

sys/riscv/sifive/fu740_pci_dw.c

159

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_EN), 1);

sys/riscv/sifive/fu740_pci_dw.c

163

ack = FUDW_MGMT_READ(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ACK));

sys/riscv/sifive/fu740_pci_dw.c

174

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, WRITE_EN), 0);

sys/riscv/sifive/fu740_pci_dw.c

178

ack = FUDW_MGMT_READ(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, ACK));

sys/riscv/sifive/fu740_pci_dw.c

245

FUDW_MGMT_WRITE(sc, FUDW_MGMT_PHY_CR_PARA_REG(phy, SEL), 1);