sys/arm/nvidia/tegra124/tegra124_car.c

195

FACT(0, "osc_div_clk", "clk_m", 1, 1);

sys/arm/nvidia/tegra124/tegra124_car.c

200

FACT(0, "clk_m_div2", "clk_m", 1, 2),

sys/arm/nvidia/tegra124/tegra124_car.c

201

FACT(0, "clk_m_div4", "clk_m", 1, 3),

sys/arm/nvidia/tegra124/tegra124_car.c

202

FACT(0, "pllU_60", "pllU_out", 1, 8),

sys/arm/nvidia/tegra124/tegra124_car.c

203

FACT(0, "pllU_48", "pllU_out", 1, 10),

sys/arm/nvidia/tegra124/tegra124_car.c

204

FACT(0, "pllU_12", "pllU_out", 1, 40),

sys/arm/nvidia/tegra124/tegra124_car.c

205

FACT(TEGRA124_CLK_PLL_D_OUT0, "pllD_out0", "pllD_out", 1, 2),

sys/arm/nvidia/tegra124/tegra124_car.c

206

FACT(TEGRA124_CLK_PLL_D2_OUT0, "pllD2_out0", "pllD2_out", 1, 1),

sys/arm/nvidia/tegra124/tegra124_car.c

207

FACT(0, "pllX_out0", "pllX_out", 1, 2),

sys/arm/nvidia/tegra124/tegra124_car.c

208

FACT(0, "pllC_UD", "pllC_out0", 1, 1),

sys/arm/nvidia/tegra124/tegra124_car.c

209

FACT(0, "pllM_UD", "pllM_out0", 1, 1),

sys/arm/nvidia/tegra124/tegra124_car.c

220

FACT(TEGRA124_CLK_XUSB_SS_DIV2, "xusb_ss_div2", "xusb_ss", 1, 2),

sys/arm64/nvidia/tegra210/tegra210_car.c

193

FACT(0, "clk_m", "osc", 1, 1);

sys/arm64/nvidia/tegra210/tegra210_car.c

195

FACT(0, "osc_div_clk", "osc", 1, 1);

sys/arm64/nvidia/tegra210/tegra210_car.c

212

FACT(TEGRA210_CLK_XUSB_SS_DIV2, "xusb_ss_div2", "xusb_ss", 1, 2),

sys/arm64/nvidia/tegra210/tegra210_car.c

215

FACT(0, "sor_safe_div", "pllP_out0", 1, 17),

sys/arm64/nvidia/tegra210/tegra210_car.c

216

FACT(0, "dpaux_div", "sor_safe", 1, 17),

sys/arm64/nvidia/tegra210/tegra210_car.c

217

FACT(0, "dpaux1_div", "sor_safe", 1, 17),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

469

FACT(0, "pllP_UD", "pllP_out0", 1, 1),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

470

FACT(0, "pllC_UD", "pllC_out0", 1, 1),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

471

FACT(0, "pllD_UD", "pllD_out0", 1, 1),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

472

FACT(0, "pllM_UD", "pllM_out0", 1, 1),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

473

FACT(0, "pllMB_UD", "pllMB_out0", 1, 1),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

474

FACT(TEGRA210_CLK_PLL_D_OUT0, "pllD_out0", "pllD_out", 1, 2),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

476

FACT(0, "pllC4_out1", "pllC4", 1, 3),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

477

FACT(0, "pllC4_out2", "pllC4", 1, 5),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

478

FACT(0, "pllD2_out0", "pllD2_out", 1, 2),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

481

FACT(0, "pllX_out0_alias", "pllX_out0", 1, 1),

sys/arm64/nvidia/tegra210/tegra210_clk_pll.c

482

FACT(0, "dfllCPU_out_alias", "dfllCPU_out", 1, 1),