Symbol: ECSPI_STATREG
sys/arm/freescale/imx/imx_spi.c
276
while (sc->rxidx < sc->rxlen && (RD4(sc, ECSPI_STATREG) & SREG_RR)) {
sys/arm/freescale/imx/imx_spi.c
309
status = RD4(sc, ECSPI_STATREG);
sys/arm/freescale/imx/imx_spi.c
310
WR4(sc, ECSPI_STATREG, status); /* Clear w1c bits. */