ECORE_IS_E5
if (ECORE_IS_E5(p_hwfn->p_dev)) {
(ECORE_IS_E5(p_hwfn->p_dev) ?
ECORE_IS_E5(p_hwfn->p_dev) ? MCP_REG_SCRATCH_SIZE_E5 : MCP_REG_SCRATCH_SIZE_BB_K2, false, 0, false, "MCP", false, 0);
} else if (ECORE_IS_E5(p_hwfn->p_dev)) {
else if (ECORE_IS_E5(p_dev))
(ECORE_IS_AH(p_dev) || ECORE_IS_E5(p_dev)))
} else if (ECORE_IS_E5(p_dev)) {
if (ECORE_IS_AH(p_hwfn->p_dev) || ECORE_IS_E5(p_hwfn->p_dev))
if (ECORE_IS_AH(p_hwfn->p_dev) || ECORE_IS_E5(p_hwfn->p_dev)) {
return NUM_OF_PHYS_TCS * (ECORE_IS_E5(p_hwfn->p_dev) ? MAX_NUM_PORTS_E5 : MAX_NUM_PORTS_BB) + port_id;
return port_id * (ECORE_IS_E5(p_hwfn->p_dev) ? NUM_OF_PHYS_TCS : max_phys_tcs_per_port) + tc;
u8 num_ext_voqs = ECORE_IS_E5(p_hwfn->p_dev) ? QM_E5_NUM_EXT_VOQ : MAX_NUM_VOQS_E4;
u8 num_ext_voqs = ECORE_IS_E5(p_hwfn->p_dev) ? QM_E5_NUM_EXT_VOQ : MAX_NUM_VOQS_E4;
if (ECORE_IS_E5(p_hwfn->p_dev))
u32 map_val = (ext_voq << QM_WFQ_VP_PQ_VOQ_SHIFT) | (pf_id << (ECORE_IS_E5(p_hwfn->p_dev) ? QM_WFQ_VP_PQ_PF_E5_SHIFT : QM_WFQ_VP_PQ_PF_E4_SHIFT));
if (ECORE_IS_E5(p_hwfn->p_dev)) {
crd_reg_offset = ECORE_IS_E5(p_hwfn->p_dev) ?