sys/dev/coretemp/coretemp.c

330

x86_msr_op(MSR_THERM_STATUS, MSR_OP_RENDEZVOUS_ONE | MSR_OP_READ |

sys/dev/coretemp/coretemp.c

338

x86_msr_op(MSR_THERM_STATUS, MSR_OP_RENDEZVOUS_ONE | MSR_OP_WRITE |

sys/dev/hwpmc/hwpmc_core.c

279

x86_msr_op(MSR_TSX_FORCE_ABORT, MSR_OP_RENDEZVOUS_ALL |

sys/dev/hwpmc/hwpmc_core.c

409

x86_msr_op(MSR_TSX_FORCE_ABORT, MSR_OP_RENDEZVOUS_ALL |

sys/x86/cpufreq/hwpstate_amd.c

553

(void)x86_msr_op(MSR_AMD_10H_11H_LIMIT,

sys/x86/cpufreq/hwpstate_amd.c

561

(void)x86_msr_op(MSR_AMD_10H_11H_STATUS,

sys/x86/cpufreq/hwpstate_amd.c

592

x86_msr_op(MSR_AMD_10H_11H_CONTROL,

sys/x86/cpufreq/hwpstate_intel.c

89

(x86_msr_op(msr, \

sys/x86/cpufreq/hwpstate_intel.c

95

x86_msr_op(msr, \

sys/x86/include/x86_var.h

186

int x86_msr_op(u_int msr, u_int op, uint64_t arg1, uint64_t *res);

sys/x86/x86/cpu_machdep.c

1135

x86_msr_op(MSR_IA32_SPEC_CTRL, (for_all_cpus ?

sys/x86/x86/cpu_machdep.c

1192

x86_msr_op(MSR_IA32_SPEC_CTRL,

sys/x86/x86/cpu_machdep.c

1484

x86_msr_op(MSR_IA32_TSX_CTRL,

sys/x86/x86/cpu_machdep.c

1650

x86_msr_op(MSR_IA32_MCU_OPT_CTRL,

sys/x86/x86/cpu_machdep.c

1772

x86_msr_op(MSR_DE_CFG,