sys/compat/linuxkpi/common/include/linux/io.h

205

#define writel(v, addr) writel(v, addr)

sys/compat/linuxkpi/common/include/linux/io.h

384

writel(v, addr);

sys/compat/linuxkpi/common/include/linux/iosys-map.h

144

uint32_t: writel(val, addr), \

sys/compat/x86bios/x86bios.c

207

writel(BIOS_PADDRTOVADDR(intno * 4), saddr);

sys/dev/bnxt/bnxt_re/qplib_rcfw.c

282

writel(cmdq_prod, cmdq->cmdq_mbox.prod);

sys/dev/bnxt/bnxt_re/qplib_rcfw.c

283

writel(RCFW_CMDQ_TRIG_VAL, cmdq->cmdq_mbox.db);

sys/dev/bnxt/bnxt_re/qplib_rcfw.c

383

writel(cmdq_prod, cmdq->cmdq_mbox.prod);

sys/dev/bnxt/bnxt_re/qplib_rcfw.c

384

writel(RCFW_CMDQ_TRIG_VAL, cmdq->cmdq_mbox.db);

sys/dev/bnxt/bnxt_re/qplib_res.h

653

writel(key, info->db);

sys/dev/cxgbe/iw_cxgbe/t4.h

495

writel(V_PIDX_T5(inc) | V_QID(wq->sq.bar2_qid),

sys/dev/cxgbe/iw_cxgbe/t4.h

519

writel(V_PIDX_T5(inc) | V_QID(wq->rq.bar2_qid),

sys/dev/cxgbe/iw_cxgbe/t4.h

570

writel(val | V_INGRESSQID(cq->bar2_qid),

sys/dev/cxgbe/iw_cxgbe/t4.h

586

writel(val | V_INGRESSQID(cq->bar2_qid),

sys/dev/cxgbe/iw_cxgbe/t4.h

591

writel(val | V_INGRESSQID(cq->bar2_qid),

sys/dev/fb/vga.c

1344

writel(d, val);

sys/dev/hptmv/mv.c

63

writel((void *)((ULONG_PTR)base + offset), val);

sys/dev/irdma/icrdma_hw.c

110

writel(val, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + idx);

sys/dev/irdma/icrdma_hw.c

121

writel(0, dev->hw_regs[IRDMA_GLINT_DYN_CTL] + idx);

sys/dev/irdma/icrdma_hw.c

141

writel(reg_val, dev->hw_regs[IRDMA_GLINT_CEQCTL] + ceq_id);

sys/dev/irdma/irdma_ctrl.c

3170

writel(0, cqp->dev->hw_regs[IRDMA_CQPTAIL]);

sys/dev/irdma/irdma_ctrl.c

3171

writel(0, cqp->dev->hw_regs[IRDMA_CQPDB]);

sys/dev/irdma/irdma_ctrl.c

3172

writel(0, cqp->dev->hw_regs[IRDMA_CCQPSTATUS]);

sys/dev/irdma/irdma_ctrl.c

3257

writel(p1, cqp->dev->hw_regs[IRDMA_CCQPHIGH]);

sys/dev/irdma/irdma_ctrl.c

3258

writel(p2, cqp->dev->hw_regs[IRDMA_CCQPLOW]);

sys/dev/irdma/irdma_ctrl.c

3349

writel(0, cqp->dev->hw_regs[IRDMA_CCQPHIGH]);

sys/dev/irdma/irdma_ctrl.c

3350

writel(0, cqp->dev->hw_regs[IRDMA_CCQPLOW]);

sys/dev/irdma/irdma_ctrl.c

4044

writel(0, dev->hw_regs[IRDMA_PFINT_AEQCTL]);

sys/dev/irdma/irdma_ctrl.c

5397

writel(reg_val, dev->hw_regs[IRDMA_PFINT_AEQCTL]);

sys/dev/irdma/irdma_hmc.c

150

writel(val, dev->hw_regs[IRDMA_PFHMC_PDINV]);

sys/dev/irdma/osdep.h

193

#define db_wr32(value, a) writel((value), (a))

sys/dev/mana/gdma_main.c

465

writel(addr, *p);

sys/dev/mana/gdma_main.c

466

writel((char *)addr + 4, *(p + 1));

sys/dev/mana/shm_channel.c

279

writel((char *)sc->base + i * SMC_BASIC_UNIT, *dword++);

sys/dev/mana/shm_channel.c

319

writel((char *)sc->base + SMC_LAST_DWORD * SMC_BASIC_UNIT,

sys/dev/mlx4/mlx4_core/mlx4_eq.c

841

writel(priv->eq_table.clr_mask, priv->eq_table.clr_int);

sys/dev/mlx4/mlx4_core/mlx4_main.c

3097

writel(0, owner);

sys/dev/mlx4/mlx4_core/mlx4_reset.c

119

writel(MLX4_RESET_VALUE, reset + MLX4_RESET_OFFSET);

sys/dev/mlx4/mlx4_en/mlx4_en_tx.c

918

writel(cpu_to_be32(ring->doorbell_qpn),

sys/dev/mlx4/mlx4_ib/mlx4_ib_qp.c

3241

writel(qp->doorbell_qpn,

sys/dev/mthca/mthca_eq.c

216

writel(eqn_mask, dev->eq_regs.arbel.eq_arm);

sys/dev/mthca/mthca_eq.c

398

writel(dev->eq_table.clr_mask, dev->eq_table.clr_int);

sys/dev/mthca/mthca_eq.c

404

writel(ecr, dev->eq_regs.tavor.ecr_base +

sys/dev/mthca/mthca_eq.c

438

writel(dev->eq_table.clr_mask, dev->eq_table.clr_int);

sys/dev/mthca/mthca_reset.c

165

writel(MTHCA_RESET_VALUE, reset);

sys/dev/syscons/scvgarndr.c

300

writel((pos), vga_palette32[color]); \

usr.sbin/lpr/common_source/lp.h

315

ssize_t writel(int _strm, ...);

usr.sbin/lpr/common_source/startdaemon.c

83

if (writel(s, "\1", pp->printer, "\n", (char *)0) <= 0) {

usr.sbin/lpr/lpd/printjob.c

1926

if (writel(pfd, "\2", pp->remote_queue, "\n", NULL) ==

usr.sbin/lpr/lpd/printjob.c

2001

writel(fd, buf, "\n", NULL);