x86_iommu
static struct x86_iommu amd_x86_iommu = {
SYSINIT(x86_iommu, SI_SUB_TUNABLES, SI_ORDER_ANY, x86_iommu_set_amd, NULL);
static struct x86_iommu dmar_x86_iommu = {
SYSINIT(x86_iommu, SI_SUB_TUNABLES, SI_ORDER_ANY, x86_iommu_set_intel, NULL);
static struct x86_iommu x86_no_iommu = {
static struct x86_iommu *x86_iommu = &x86_no_iommu;
set_x86_iommu(struct x86_iommu *x)
MPASS(x86_iommu == &x86_no_iommu);
x86_iommu = x;
struct x86_iommu *
return (x86_iommu);
x86_iommu->domain_unload_entry(entry, free, cansleep);
x86_iommu->domain_unload(iodom, entries, cansleep);
return (x86_iommu->get_ctx(iommu, dev, rid, id_mapped, rmrr_init));
x86_iommu->free_ctx_locked(iommu, context);
return (x86_iommu->find(dev, verbose));
return (x86_iommu->alloc_msi_intr(src, cookies, count));
return (x86_iommu->map_msi_intr(src, cpu, vector, cookie,
return (x86_iommu->unmap_msi_intr(src, cookie));
return (x86_iommu->map_ioapic_intr(ioapic_id, cpu, vector, edge,
return (x86_iommu->unmap_ioapic_intr(ioapic_id, cookie));
x86_iommu->unit_pre_instantiate_ctx(unit);
#define IOMMU2X86C(iommu) (x86_iommu->get_x86_common(iommu))
x86_iommu->qi_ensure(unit, 1);
x86_iommu->qi_emit_wait_descr(unit, gsec.seq, false,
x86_iommu->qi_advance_tail(unit);
x86_iommu->qi_ensure(unit, 1);
x86_iommu->qi_emit_wait_descr(unit, seq, true, true, false);
x86_iommu->qi_invalidate_emit(domain, entry->start, entry->end -
x86_iommu->qi_advance_tail(unit);
x86_iommu->qi_invalidate_emit(domain, base, size, &gseq, true);
x86_iommu->qi_advance_tail(unit);
x86_iommu->qi_ensure(unit, 1);
x86_iommu->qi_advance_tail(unit);
void set_x86_iommu(struct x86_iommu *);
struct x86_iommu *get_x86_iommu(void);