sys/amd64/vmm/intel/vmx.c

706

error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,

sys/amd64/vmm/intel/vmx.c

720

error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

731

error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2, MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

737

error = vmx_set_ctlreg(MSR_VMX_PINBASED_CTLS,

sys/amd64/vmm/intel/vmx.c

748

error = vmx_set_ctlreg(MSR_VMX_EXIT_CTLS, MSR_VMX_TRUE_EXIT_CTLS,

sys/amd64/vmm/intel/vmx.c

759

error = vmx_set_ctlreg(MSR_VMX_ENTRY_CTLS, MSR_VMX_TRUE_ENTRY_CTLS,

sys/amd64/vmm/intel/vmx.c

772

cap_halt_exit = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,

sys/amd64/vmm/intel/vmx.c

777

cap_monitor_trap = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,

sys/amd64/vmm/intel/vmx.c

782

cap_pause_exit = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,

sys/amd64/vmm/intel/vmx.c

787

cap_wbinvd_exit = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

822

error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

832

cap_unrestricted_guest = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

837

cap_invpcid = (vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

844

error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS,

sys/amd64/vmm/intel/vmx.c

871

error = vmx_set_ctlreg(MSR_VMX_PROCBASED_CTLS2, MSR_VMX_PROCBASED_CTLS2,

sys/amd64/vmm/intel/vmx.c

892

error = vmx_set_ctlreg(MSR_VMX_PINBASED_CTLS,

sys/amd64/vmm/intel/vmx_msr.h

45

int vmx_set_ctlreg(int ctl_reg, int true_ctl_reg, uint32_t ones_mask,