ure_ocp_reg_write
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_ANAR * 2,
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_100T2CR * 2, gig);
ure_ocp_reg_write(sc, 0xa5d4, reg);
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_BMCR,
static void ure_ocp_reg_write(struct ure_softc *, uint16_t, uint16_t);
ure_ocp_reg_write(sc, URE_OCP_ADC_CFG,
ure_ocp_reg_write(sc, URE_OCP_EEE_CFG,
ure_ocp_reg_write(sc, URE_OCP_POWER_CFG,
ure_ocp_reg_write(sc, URE_OCP_DOWN_SPEED,
ure_ocp_reg_write(sc, URE_OCP_POWER_CFG,
ure_ocp_reg_write(sc, 0xa468,
ure_ocp_reg_write(sc, 0xa466,
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + MII_BMCR, val);
ure_ocp_reg_write(sc, URE_OCP_POWER_CFG,
ure_ocp_reg_write(sc, URE_OCP_ALDPS_CONFIG, URE_ENPDNPS | URE_LINKENA |
ure_ocp_reg_write(sc, URE_OCP_SRAM_ADDR, addr);
ure_ocp_reg_write(sc, URE_OCP_SRAM_DATA, data);
ure_ocp_reg_write(sc, URE_OCP_BASE_MII + reg * 2, val);