ti_edma3_cc_wr_4
ti_edma3_cc_wr_4(TI_EDMA3CC_EMCR, 0xFFFFFFFF);
ti_edma3_cc_wr_4(TI_EDMA3CC_EMCRH, 0xFFFFFFFF);
ti_edma3_cc_wr_4(TI_EDMA3CC_QEMCR, 0xFFFFFFFF);
ti_edma3_cc_wr_4(TI_EDMA3CC_CCERRCLR, 0xFFFFFFFF);
ti_edma3_cc_wr_4(TI_EDMA3CC_DRAE(0), 0xFFFFFFFF);
ti_edma3_cc_wr_4(TI_EDMA3CC_DRAEH(0), 0xFFFFFFFF);
ti_edma3_cc_wr_4(TI_EDMA3CC_DCHMAP(i), i<<5);
ti_edma3_cc_wr_4(TI_EDMA3CC_DMAQNUM(i>>3), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_QRAE(0), (1 << TI_EDMA3_NUM_QDMA_CHS) - 1);
ti_edma3_cc_wr_4(TI_EDMA3CC_QDMAQNUM, reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_S_IESR(0), 1 << ch);
ti_edma3_cc_wr_4(TI_EDMA3CC_S_IESRH(0), 1 << (ch - 32));
ti_edma3_cc_wr_4(TI_EDMA3CC_DRAE(0), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_DRAEH(0), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_DMAQNUM(ch >> 3), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_OPT(ch), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_QRAE(0), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_QDMAQNUM, reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_OPT(ch), reg);
ti_edma3_cc_wr_4(TI_EDMA3CC_S_ESR(0), 1 << ch);
ti_edma3_cc_wr_4(TI_EDMA3CC_S_ESRH(0), 1 << (ch - 32));
ti_edma3_cc_wr_4(TI_EDMA3CC_S_QEESR(0), (1 << ch));
ti_edma3_cc_wr_4(TI_EDMA3CC_S_SECR(0), (1 << ch));
ti_edma3_cc_wr_4(TI_EDMA3CC_EMCR, (1 << ch));
ti_edma3_cc_wr_4(TI_EDMA3CC_S_EESR(0), (1 << ch));
ti_edma3_cc_wr_4(TI_EDMA3CC_S_SECRH(0), 1 << (ch - 32));
ti_edma3_cc_wr_4(TI_EDMA3CC_EMCRH, 1 << (ch - 32));
ti_edma3_cc_wr_4(TI_EDMA3CC_S_EESRH(0), 1 << (ch - 32));