sys/arm/ti/ti_i2c.c

239

(uint8_t)(ti_i2c_read_2(sc, I2C_REG_DATA) & 0xff);

sys/arm/ti/ti_i2c.c

309

status = ti_i2c_read_2(sc, I2C_REG_STATUS);

sys/arm/ti/ti_i2c.c

316

events = ti_i2c_read_2(sc, I2C_REG_IRQENABLE_SET);

sys/arm/ti/ti_i2c.c

390

while (ti_i2c_read_2(sc, I2C_REG_STATUS_RAW) & I2C_STAT_BB) {

sys/arm/ti/ti_i2c.c

411

reg = ti_i2c_read_2(sc, I2C_REG_BUF);

sys/arm/ti/ti_i2c.c

433

while (ti_i2c_read_2(sc, I2C_REG_STATUS_RAW) & I2C_STAT_BB) {

sys/arm/ti/ti_i2c.c

440

if ((ti_i2c_read_2(sc, I2C_REG_CON) & I2C_CON_MST) == 0)

sys/arm/ti/ti_i2c.c

511

while ((ti_i2c_read_2(sc, I2C_REG_SYSS) & I2C_SYSS_RDONE) == 0) {

sys/arm/ti/ti_i2c.c

727

psc = (int)ti_i2c_read_2(sc, I2C_REG_PSC) + 1;

sys/arm/ti/ti_i2c.c

730

scll = (int)ti_i2c_read_2(sc, I2C_REG_SCLL) & I2C_SCLL_MASK;

sys/arm/ti/ti_i2c.c

731

sclh = (int)ti_i2c_read_2(sc, I2C_REG_SCLH) & I2C_SCLH_MASK;

sys/arm/ti/ti_i2c.c

821

sc->sc_rev = ti_i2c_read_2(sc, I2C_REG_REVNB_HI) & 0xff;

sys/arm/ti/ti_i2c.c

824

fifosz = ti_i2c_read_2(sc, I2C_REG_BUFSTAT);