sys/arm/ti/am335x/am335x_dmtimer.c

215

return (DMTIMER_READ4(sc, DMT_TCRR));

sys/arm/ti/am335x/am335x_dmtimer.c

225

while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET)

sys/arm/ti/am335x/am335x_dmtimer.c

390

first = DMTIMER_READ4(sc, DMT_TCRR);

sys/arm/ti/am335x/am335x_dmtimer.c

393

last = DMTIMER_READ4(sc, DMT_TCRR);

sys/arm/ti/am335x/am335x_dmtpps.c

274

return (DMTIMER_READ4(sc, DMT_TCRR));

sys/arm/ti/am335x/am335x_dmtpps.c

302

if (DMTIMER_READ4(sc, DMT_IRQSTATUS_RAW) & DMT_IRQ_TCAR) {

sys/arm/ti/am335x/am335x_dmtpps.c

304

sc->pps_state.capcount = DMTIMER_READ4(sc, DMT_TCAR1);

sys/arm/ti/am335x/am335x_dmtpps.c

531

while (DMTIMER_READ4(sc, DMT_TIOCP_CFG) & DMT_TIOCP_RESET)