DMA_WRITE
DMA_WRITE(sc, AWIN_DMA_IRQ_EN_REG, 0);
DMA_WRITE(sc, AWIN_DMA_IRQ_PEND_STA_REG, ~0);
DMA_WRITE(sc, AWIN_DMA_IRQ_PEND_STA_REG, sta);
DMA_WRITE(sc, AWIN_DMA_IRQ_EN_REG, irqen);
DMA_WRITE(sc, AWIN_DMA_IRQ_EN_REG, irqen);
DMA_WRITE(sc, AWIN_DMA_IRQ_PEND_STA_REG, sta);
DMA_WRITE((ch)->ch_sc, (reg) + (ch)->ch_regoff, (val))
DMA_WRITE(sc, DMA_IRQ_EN_REG0, 0);
DMA_WRITE(sc, DMA_IRQ_EN_REG1, 0);
DMA_WRITE(sc, DMA_IRQ_PEND_REG0, ~0);
DMA_WRITE(sc, DMA_IRQ_PEND_REG1, ~0);
DMA_WRITE(sc, DMA_EN_REG(index), 0);
DMA_WRITE(sc, DMA_IRQ_PEND_REG0, pend0);
DMA_WRITE(sc, DMA_IRQ_PEND_REG1, pend1);
DMA_WRITE(sc, DMA_IRQ_EN_REG(index), irqen);
DMA_WRITE(sc, DMA_IRQ_EN_REG(index), irqen);
DMA_WRITE(sc, DMA_IRQ_PEND_REG(index), DMA_PKG_IRQ_EN(index));
DMA_WRITE(sc, DMA_STAR_ADDR_REG(ch->index), (uint32_t)ch->physaddr);
DMA_WRITE(sc, DMA_EN_REG(ch->index), DMA_EN);
DMA_WRITE(sc, DMA_EN_REG(ch->index), 0);