sys/dev/cxgbe/common/t4_hw.c

105

u32 val = t4_read_reg(adap, reg);

sys/dev/cxgbe/common/t4_hw.c

110

*valp = t4_read_reg(adap, result_reg);

sys/dev/cxgbe/common/t4_hw.c

11169

pl_rev = t4_read_reg(adapter, A_PL_REV);

sys/dev/cxgbe/common/t4_hw.c

11248

t4_read_reg(adapter, a_port_cfg)

sys/dev/cxgbe/common/t4_hw.c

11375

t4_read_reg(adap, PCIE_FW_REG(A_PCIE_FW_PF, PCIE_FW_PF_DEVLOG));

sys/dev/cxgbe/common/t4_hw.c

11437

r = t4_read_reg(adapter, A_SGE_INGRESS_RX_THRESHOLD);

sys/dev/cxgbe/common/t4_hw.c

11444

r = t4_read_reg(adapter, A_SGE_ITP_CONTROL);

sys/dev/cxgbe/common/t4_hw.c

11452

r = t4_read_reg(adapter, A_SGE_TIMER_VALUE_0_AND_1);

sys/dev/cxgbe/common/t4_hw.c

11455

r = t4_read_reg(adapter, A_SGE_TIMER_VALUE_2_AND_3);

sys/dev/cxgbe/common/t4_hw.c

11458

r = t4_read_reg(adapter, A_SGE_TIMER_VALUE_4_AND_5);

sys/dev/cxgbe/common/t4_hw.c

11462

r = t4_read_reg(adapter, A_SGE_CONM_CTRL);

sys/dev/cxgbe/common/t4_hw.c

11472

r = t4_read_reg(adapter, A_SGE_EGRESS_QUEUES_PER_PAGE_PF);

sys/dev/cxgbe/common/t4_hw.c

11478

r = t4_read_reg(adapter, A_SGE_INGRESS_QUEUES_PER_PAGE_PF);

sys/dev/cxgbe/common/t4_hw.c

11483

r = t4_read_reg(adapter, A_SGE_HOST_PAGE_SIZE);

sys/dev/cxgbe/common/t4_hw.c

11488

r = t4_read_reg(adapter, A_SGE_CONTROL);

sys/dev/cxgbe/common/t4_hw.c

11502

r = t4_read_reg(adapter, A_SGE_CONTROL2);

sys/dev/cxgbe/common/t4_hw.c

11509

sp->sge_fl_buffer_size[i] = t4_read_reg(adapter,

sys/dev/cxgbe/common/t4_hw.c

11576

v = t4_read_reg(adap, LE_HASH_MASK_GEN_IPV4T5(3));

sys/dev/cxgbe/common/t4_hw.c

11578

v = t4_read_reg(adap, LE_HASH_MASK_GEN_IPV4T5(4));

sys/dev/cxgbe/common/t4_hw.c

11648

v = t4_read_reg(adap, A_TP_TIMER_RESOLUTION);

sys/dev/cxgbe/common/t4_hw.c

11658

v = t4_read_reg(adap, A_TP_OUT_CONFIG);

sys/dev/cxgbe/common/t4_hw.c

11670

rx_len = t4_read_reg(adap, A_TP_PMM_RX_PAGE_SIZE);

sys/dev/cxgbe/common/t4_hw.c

11671

tx_len = t4_read_reg(adap, A_TP_PMM_TX_PAGE_SIZE);

sys/dev/cxgbe/common/t4_hw.c

11673

r = t4_read_reg(adap, A_TP_PARA_REG2);

sys/dev/cxgbe/common/t4_hw.c

11677

r = t4_read_reg(adap, A_TP_PARA_REG7);

sys/dev/cxgbe/common/t4_hw.c

11904

v = t4_read_reg(adap, A_CIM_QUEUE_CONFIG_CTRL);

sys/dev/cxgbe/common/t4_hw.c

11930

v = t4_read_reg(adap, A_CIM_QUEUE_CONFIG_CTRL);

sys/dev/cxgbe/common/t4_hw.c

11984

*data = t4_read_reg(adap, A_CIM_IBQ_DBG_DATA);

sys/dev/cxgbe/common/t4_hw.c

12044

*data = t4_read_reg(adap, A_CIM_OBQ_DBG_DATA);

sys/dev/cxgbe/common/t4_hw.c

12115

if (t4_read_reg(adap, A_CIM_HOST_ACC_CTRL) & hostbusy)

sys/dev/cxgbe/common/t4_hw.c

12123

*valp++ = t4_read_reg(adap, A_CIM_HOST_ACC_DATA);

sys/dev/cxgbe/common/t4_hw.c

12158

if (t4_read_reg(adap, A_CIM_HOST_ACC_CTRL) & hostbusy)

sys/dev/cxgbe/common/t4_hw.c

12267

cfg = t4_read_reg(adap, A_TP_DBG_LA_CONFIG) & 0xffff;

sys/dev/cxgbe/common/t4_hw.c

12272

val = t4_read_reg(adap, A_TP_DBG_LA_CONFIG);

sys/dev/cxgbe/common/t4_hw.c

12357

idma_same_state_cnt[0] = t4_read_reg(adapter, A_SGE_DEBUG_DATA_HIGH);

sys/dev/cxgbe/common/t4_hw.c

12358

idma_same_state_cnt[1] = t4_read_reg(adapter, A_SGE_DEBUG_DATA_LOW);

sys/dev/cxgbe/common/t4_hw.c

12410

debug0 = t4_read_reg(adapter, A_SGE_DEBUG_DATA_LOW);

sys/dev/cxgbe/common/t4_hw.c

12414

debug11 = t4_read_reg(adapter, A_SGE_DEBUG_DATA_LOW);

sys/dev/cxgbe/common/t4_hw.c

12481

v = t4_read_reg(adap, A_TP_PACE_TABLE);

sys/dev/cxgbe/common/t4_hw.c

13232

*data++ = t4_read_reg(adap, i);

sys/dev/cxgbe/common/t4_hw.c

13234

*data++ = t4_read_reg(adap, i);

sys/dev/cxgbe/common/t4_hw.c

135

u32 v = t4_read_reg(adapter, addr) & ~mask;

sys/dev/cxgbe/common/t4_hw.c

138

(void) t4_read_reg(adapter, addr); /* flush */

sys/dev/cxgbe/common/t4_hw.c

159

*vals++ = t4_read_reg(adap, data_reg);

sys/dev/cxgbe/common/t4_hw.c

210

val = t4_read_reg(adap, A_PCIE_CFG_SPACE_DATA);

sys/dev/cxgbe/common/t4_hw.c

245

pcie_fw = t4_read_reg(adap, A_PCIE_FW);

sys/dev/cxgbe/common/t4_hw.c

328

if (t4_read_reg(sc, port_ctl_reg) & F_PORTTXEN &&

sys/dev/cxgbe/common/t4_hw.c

3388

*bufp++ = t4_read_reg(adap, reg);

sys/dev/cxgbe/common/t4_hw.c

3858

if (t4_read_reg(adapter, A_SF_OP) & F_BUSY)

sys/dev/cxgbe/common/t4_hw.c

3866

*valp = t4_read_reg(adapter, A_SF_DATA);

sys/dev/cxgbe/common/t4_hw.c

3887

if (t4_read_reg(adapter, A_SF_OP) & F_BUSY)

sys/dev/cxgbe/common/t4_hw.c

414

pcie_fw = t4_read_reg(adap, A_PCIE_FW);

sys/dev/cxgbe/common/t4_hw.c

419

ctl = t4_read_reg(adap, ctl_reg);

sys/dev/cxgbe/common/t4_hw.c

430

pcie_fw = t4_read_reg(adap, A_PCIE_FW);

sys/dev/cxgbe/common/t4_hw.c

4431

cfg = t4_read_reg(adap, A_CIM_DEBUGCFG);

sys/dev/cxgbe/common/t4_hw.c

4435

val = t4_read_reg(adap, A_CIM_DEBUGSTS);

sys/dev/cxgbe/common/t4_hw.c

4447

*pif_req++ = t4_read_reg(adap, A_CIM_PO_LA_DEBUGDATA);

sys/dev/cxgbe/common/t4_hw.c

4448

*pif_rsp++ = t4_read_reg(adap, A_CIM_PI_LA_DEBUGDATA);

sys/dev/cxgbe/common/t4_hw.c

4463

cfg = t4_read_reg(adap, A_CIM_DEBUGCFG);

sys/dev/cxgbe/common/t4_hw.c

4472

*ma_req++ = t4_read_reg(adap, A_CIM_PO_LA_MADEBUGDATA);

sys/dev/cxgbe/common/t4_hw.c

4473

*ma_rsp++ = t4_read_reg(adap, A_CIM_PI_LA_MADEBUGDATA);

sys/dev/cxgbe/common/t4_hw.c

4487

j = t4_read_reg(adap, A_ULP_RX_LA_WRPTR);

sys/dev/cxgbe/common/t4_hw.c

4490

*p = t4_read_reg(adap, A_ULP_RX_LA_RDDATA);

sys/dev/cxgbe/common/t4_hw.c

471

t4_read_reg(adap, data_reg);

sys/dev/cxgbe/common/t4_hw.c

4848

cause = t4_read_reg(sc, ii->cause_reg);

sys/dev/cxgbe/common/t4_hw.c

4849

enabled = t4_read_reg(sc, ii->enable_reg);

sys/dev/cxgbe/common/t4_hw.c

486

pcie_fw = t4_read_reg(adap, A_PCIE_FW);

sys/dev/cxgbe/common/t4_hw.c

4876

(void)t4_read_reg(sc, ii->cause_reg);

sys/dev/cxgbe/common/t4_hw.c

4879

(void)t4_read_reg(sc, ii->cause_reg);

sys/dev/cxgbe/common/t4_hw.c

505

v = t4_read_reg(adap, ctl_reg);

sys/dev/cxgbe/common/t4_hw.c

5302

v = t4_read_reg(adap, A_SGE_ERROR_STATS);

sys/dev/cxgbe/common/t4_hw.c

5445

fw_err = t4_read_reg(adap, A_PCIE_FW);

sys/dev/cxgbe/common/t4_hw.c

5446

val = t4_read_reg(adap, A_CIM_HOST_INT_CAUSE);

sys/dev/cxgbe/common/t4_hw.c

575

t4_read_reg(adap, edc_ecc_err_addr_reg));

sys/dev/cxgbe/common/t4_hw.c

6087

t4_read_reg(adap, A_MPS_INT_CAUSE); /* flush */

sys/dev/cxgbe/common/t4_hw.c

6199

v = t4_read_reg(adap, count_reg);

sys/dev/cxgbe/common/t4_hw.c

6223

v = t4_read_reg(adap, A_MA_INT_WRAP_STATUS);

sys/dev/cxgbe/common/t4_hw.c

627

if (t4_read_reg(adap, mc_bist_cmd_reg) & F_START_BIST)

sys/dev/cxgbe/common/t4_hw.c

641

*data++ = ntohl(t4_read_reg(adap, MC_DATA(i)));

sys/dev/cxgbe/common/t4_hw.c

6500

t4_read_reg(adap, A_PL_TIMEOUT_STATUS0),

sys/dev/cxgbe/common/t4_hw.c

6501

t4_read_reg(adap, A_PL_TIMEOUT_STATUS1));

sys/dev/cxgbe/common/t4_hw.c

66

u32 val = t4_read_reg(adapter, reg);

sys/dev/cxgbe/common/t4_hw.c

6797

cause = t4_read_reg(sc, ii->cause_reg);

sys/dev/cxgbe/common/t4_hw.c

6799

cause &= t4_read_reg(sc, ii->enable_reg);

sys/dev/cxgbe/common/t4_hw.c

684

if (t4_read_reg(adap, edc_bist_cmd_reg) & F_START_BIST)

sys/dev/cxgbe/common/t4_hw.c

698

*data++ = ntohl(t4_read_reg(adap, EDC_DATA(i)));

sys/dev/cxgbe/common/t4_hw.c

7134

(void)t4_read_reg(adap, pl_perr_cause.cause_reg);

sys/dev/cxgbe/common/t4_hw.c

7144

(void)t4_read_reg(adap, t7_pl_perr_cause.cause_reg);

sys/dev/cxgbe/common/t4_hw.c

7617

u32 vrt = t4_read_reg(adap, A_TP_RSS_CONFIG_VRT);

sys/dev/cxgbe/common/t4_hw.c

7700

vrt = t4_read_reg(adapter, A_TP_RSS_CONFIG_VRT);

sys/dev/cxgbe/common/t4_hw.c

7745

vrt = t4_read_reg(adapter, A_TP_RSS_CONFIG_VRT);

sys/dev/cxgbe/common/t4_hw.c

8036

v = t4_read_reg(adap, A_TP_MTU_TABLE);

sys/dev/cxgbe/common/t4_hw.c

8059

incr[mtu][w] = (u16)t4_read_reg(adap,

sys/dev/cxgbe/common/t4_hw.c

8077

val |= t4_read_reg(adap, A_TP_PIO_DATA) & ~mask;

sys/dev/cxgbe/common/t4_hw.c

8238

v = t4_read_reg(adap, A_TP_TM_PIO_DATA);

sys/dev/cxgbe/common/t4_hw.c

8266

v = t4_read_reg(adap, A_TP_TM_PIO_DATA);

sys/dev/cxgbe/common/t4_hw.c

8272

t4_read_reg(adap, A_TP_TM_PIO_DATA);

sys/dev/cxgbe/common/t4_hw.c

8306

v = t4_read_reg(adap, A_TP_TX_TRATE);

sys/dev/cxgbe/common/t4_hw.c

8314

v = t4_read_reg(adap, A_TP_TX_ORATE);

sys/dev/cxgbe/common/t4_hw.c

8366

cfg = t4_read_reg(adap, A_MPS_TRC_CFG);

sys/dev/cxgbe/common/t4_hw.c

8428

ctla = t4_read_reg(adap, T7_MPS_TRC_FILTER_MATCH_CTL_A(idx));

sys/dev/cxgbe/common/t4_hw.c

8429

ctlb = t4_read_reg(adap, T7_MPS_TRC_FILTER_MATCH_CTL_B(idx));

sys/dev/cxgbe/common/t4_hw.c

8431

ctla = t4_read_reg(adap, MPS_TRC_FILTER_MATCH_CTL_A(idx));

sys/dev/cxgbe/common/t4_hw.c

8432

ctlb = t4_read_reg(adap, MPS_TRC_FILTER_MATCH_CTL_B(idx));

sys/dev/cxgbe/common/t4_hw.c

8454

tp->mask[i] = ~t4_read_reg(adap, mask_reg);

sys/dev/cxgbe/common/t4_hw.c

8455

tp->data[i] = t4_read_reg(adap, data_reg) & tp->mask[i];

sys/dev/cxgbe/common/t4_hw.c

8505

cnt[i] = t4_read_reg(adap, A_PM_TX_STAT_COUNT);

sys/dev/cxgbe/common/t4_hw.c

8534

cnt[i] = t4_read_reg(adap, A_PM_RX_STAT_COUNT);

sys/dev/cxgbe/common/t4_hw.c

8559

stats[j] = t4_read_reg(adap, A_PM_RX_STAT_COUNT);

sys/dev/cxgbe/common/t4_hw.c

8783

stat_ctl = t4_read_reg(adap, A_MPS_STAT_CTL);

sys/dev/cxgbe/common/t4_hw.c

8948

t4_read_reg(adap, EPIO_REG(OP)); /* flush */

sys/dev/cxgbe/common/t4_hw.c

8949

if (t4_read_reg(adap, EPIO_REG(OP)) & F_BUSY)

sys/dev/cxgbe/common/t4_hw.c

8955

t4_read_reg(adap, EPIO_REG(OP)); /* flush */

sys/dev/cxgbe/common/t4_hw.c

8956

if (t4_read_reg(adap, EPIO_REG(OP)) & F_BUSY)

sys/dev/cxgbe/common/t4_hw.c

9232

sge_regs[i], t4_read_reg(adapter, sge_regs[i]));

sys/dev/cxgbe/common/t4_hw.c

9354

pcie_fw = t4_read_reg(adap, A_PCIE_FW);

sys/dev/cxgbe/common/t4_hw.c

9499

if (!(t4_read_reg(adap, A_PCIE_FW) & F_PCIE_FW_HALT))

sys/dev/cxgbe/common/t4vf_hw.c

141

whoami = t4_read_reg(adapter, VF_PL_REG(A_PL_VF_WHOAMI));

sys/dev/cxgbe/common/t4vf_hw.c

52

val = t4_read_reg(adapter, whoami);

sys/dev/cxgbe/common/t4vf_hw.c

56

val = t4_read_reg(adapter, whoami);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1001

md->base = t4_read_reg(padap, A_ULP_TX_ERR_TABLE_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1028

lo = t4_read_reg(padap, A_CIM_SDRAM_BASE_ADDR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1029

hi = t4_read_reg(padap, A_CIM_SDRAM_ADDR_SIZE) + lo - 1;

sys/dev/cxgbe/cudbg/cudbg_lib.c

1033

lo = t4_read_reg(padap, A_CIM_EXTMEM2_BASE_ADDR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1034

hi = t4_read_reg(padap, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1;

sys/dev/cxgbe/cudbg/cudbg_lib.c

1038

lo = t4_read_reg(padap, A_TP_PMM_RX_MAX_PAGE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1041

t4_read_reg(padap, A_TP_PMM_RX_PAGE_SIZE) >> 10;

sys/dev/cxgbe/cudbg/cudbg_lib.c

1044

lo = t4_read_reg(padap, A_TP_PMM_TX_MAX_PAGE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1045

hi = t4_read_reg(padap, A_TP_PMM_TX_PAGE_SIZE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1055

lo = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

1058

lo = t4_read_reg(padap, A_MPS_RX_PG_RSV0 + i * 4);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1072

lo = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

1075

lo = t4_read_reg(padap, A_MPS_RX_PG_RSV4 + i * 4);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1225

clk_info_buff->res = t4_read_reg(padap, A_TP_TIMER_RESOLUTION);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1232

t4_read_reg(padap, A_TP_DACK_TIMER);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1235

tp_tick_us * t4_read_reg(padap, A_TP_RXT_MIN);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1237

tp_tick_us * t4_read_reg(padap, A_TP_RXT_MAX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1240

tp_tick_us * t4_read_reg(padap, A_TP_PERS_MIN);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1242

tp_tick_us * t4_read_reg(padap, A_TP_PERS_MAX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1245

tp_tick_us * t4_read_reg(padap, A_TP_KEEP_IDLE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1247

tp_tick_us * t4_read_reg(padap, A_TP_KEEP_INTVL);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1250

tp_tick_us * G_INITSRTT(t4_read_reg(padap, A_TP_INIT_SRTT));

sys/dev/cxgbe/cudbg/cudbg_lib.c

1252

tp_tick_us * t4_read_reg(padap, A_TP_FINWAIT2_TIMER);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1364

tp_la_buff->mode = G_DBGLAMODE(t4_read_reg(padap, A_TP_DBG_LA_CONFIG));

sys/dev/cxgbe/cudbg/cudbg_lib.c

1505

hw_sched_buff->map = t4_read_reg(padap, A_TP_TX_MOD_QUEUE_REQ_MAP);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1506

hw_sched_buff->mode = G_TIMERMODE(t4_read_reg(padap, A_TP_MOD_CONFIG));

sys/dev/cxgbe/cudbg/cudbg_lib.c

1631

rss_conf->tp_rssconf = t4_read_reg(padap, A_TP_RSS_CONFIG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1632

rss_conf->tp_rssconf_tnl = t4_read_reg(padap, A_TP_RSS_CONFIG_TNL);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1633

rss_conf->tp_rssconf_ofd = t4_read_reg(padap, A_TP_RSS_CONFIG_OFD);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1634

rss_conf->tp_rssconf_syn = t4_read_reg(padap, A_TP_RSS_CONFIG_SYN);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1635

rss_conf->tp_rssconf_vrt = t4_read_reg(padap, A_TP_RSS_CONFIG_VRT);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1636

rss_conf->tp_rssconf_cng = t4_read_reg(padap, A_TP_RSS_CONFIG_CNG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

1797

value = t4_read_reg(padap, A_SGE_FLM_CFG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2679

value = t4_read_reg(padap, A_MA_EXT_MEMORY_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2683

value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2688

value = t4_read_reg(padap, A_MA_EXT_MEMORY0_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2692

value = t4_read_reg(padap, A_MA_EXT_MEMORY1_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2696

value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2703

value = t4_read_reg(padap, A_MA_EDRAM0_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2707

value = t4_read_reg(padap, A_MA_EDRAM1_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2711

value = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2954

val = t4_read_reg(padap, A_CIM_HOST_ACC_CTRL);

sys/dev/cxgbe/cudbg/cudbg_lib.c

2978

*val = t4_read_reg(padap, A_CIM_HOST_ACC_DATA);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3327

tid->hash_base = t4_read_reg(padap, A_LE_DB_TID_HASHBASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3330

tid->hash_base = t4_read_reg(padap, A_T6_LE_DB_HASH_TID_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3331

tid1->tid_start = t4_read_reg(padap, A_LE_DB_ACTIVE_TABLE_START_INDEX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3334

tid->le_db_conf = t4_read_reg(padap, A_LE_DB_CONFIG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3401

tid->sb = t4_read_reg(padap, A_LE_DB_SERVER_INDEX) / 4;

sys/dev/cxgbe/cudbg/cudbg_lib.c

3404

tid->sb = t4_read_reg(padap, A_LE_DB_SRVR_START_INDEX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3420

tid->IP_users = t4_read_reg(padap, A_LE_DB_ACT_CNT_IPV4);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3421

tid->IPv6_users = t4_read_reg(padap, A_LE_DB_ACT_CNT_IPV6);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3482

mps_rplc->rplc255_224 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3484

mps_rplc->rplc223_192 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3486

mps_rplc->rplc191_160 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3488

mps_rplc->rplc159_128 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3491

mps_rplc->rplc255_224 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3493

mps_rplc->rplc223_192 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3495

mps_rplc->rplc191_160 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3497

mps_rplc->rplc159_128 = htonl(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3500

mps_rplc->rplc127_96 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP3));

sys/dev/cxgbe/cudbg/cudbg_lib.c

3501

mps_rplc->rplc95_64 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP2));

sys/dev/cxgbe/cudbg/cudbg_lib.c

3502

mps_rplc->rplc63_32 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP1));

sys/dev/cxgbe/cudbg/cudbg_lib.c

3503

mps_rplc->rplc31_0 = htonl(t4_read_reg(padap, A_MPS_VF_RPLCT_MAP0));

sys/dev/cxgbe/cudbg/cudbg_lib.c

3546

val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3548

tcamy |= t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3549

data2 = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3574

val = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3576

tcamx |= t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3577

data2 = t4_read_reg(padap, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3593

tcam->cls_lo = t4_read_reg(padap, MPS_CLS_SRAM_L(i));

sys/dev/cxgbe/cudbg/cudbg_lib.c

3594

tcam->cls_hi = t4_read_reg(padap, MPS_CLS_SRAM_H(i));

sys/dev/cxgbe/cudbg/cudbg_lib.c

3735

val = t4_read_reg(padap, A_LE_DB_DBGI_CONFIG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3748

val = t4_read_reg(padap, A_LE_DB_DBGI_RSP_STATUS);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3758

tid_data->data[i] = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

3780

value = t4_read_reg(padap, A_LE_DB_TID_HASHBASE); /* Get hash base

sys/dev/cxgbe/cudbg/cudbg_lib.c

3785

value = t4_read_reg(padap, A_LE_DB_ROUTING_TABLE_INDEX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3789

value = t4_read_reg(padap, A_LE_DB_CLIP_TABLE_INDEX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3793

value = t4_read_reg(padap, A_LE_DB_FILTER_TABLE_INDEX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3797

value = t4_read_reg(padap, A_LE_DB_SERVER_INDEX);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3801

value = t4_read_reg(padap, A_LE_DB_CONFIG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

3803

value = t4_read_reg(padap, A_LE_DB_HASH_CONFIG);

sys/dev/cxgbe/cudbg/cudbg_lib.c

4346

*sp = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_10);

sys/dev/cxgbe/cudbg/cudbg_lib.c

622

swstate->fw_state = t4_read_reg(padap, A_PCIE_FW);

sys/dev/cxgbe/cudbg/cudbg_lib.c

692

ulptx_la_buff->rdptr[i] = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

695

ulptx_la_buff->wrptr[i] = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

698

ulptx_la_buff->rddata[i] = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

703

t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

810

val1 = t4_read_reg(padap, A_SGE_STAT_TOTAL);

sys/dev/cxgbe/cudbg/cudbg_lib.c

811

val2 = t4_read_reg(padap, A_SGE_STAT_MATCH);

sys/dev/cxgbe/cudbg/cudbg_lib.c

860

lo = t4_read_reg(padap, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

863

hi = t4_read_reg(padap, A_MA_EDRAM0_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

872

hi = t4_read_reg(padap, A_MA_EDRAM1_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

882

hi = t4_read_reg(padap, A_MA_EXT_MEMORY0_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

892

hi = t4_read_reg(padap, A_MA_EXT_MEMORY1_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

902

hi = t4_read_reg(padap, A_MA_EXT_MEMORY_BAR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

920

(md++)->base = t4_read_reg(padap, A_SGE_DBQ_CTXT_BADDR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

921

(md++)->base = t4_read_reg(padap, A_SGE_IMSG_CTXT_BADDR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

922

(md++)->base = t4_read_reg(padap, A_SGE_FLM_CACHE_BADDR);

sys/dev/cxgbe/cudbg/cudbg_lib.c

923

(md++)->base = t4_read_reg(padap, A_TP_CMM_TCB_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

924

(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

925

(md++)->base = t4_read_reg(padap, A_TP_CMM_TIMER_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

926

(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_RX_FLST_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

927

(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_TX_FLST_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

928

(md++)->base = t4_read_reg(padap, A_TP_CMM_MM_PS_FLST_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

931

md->base = t4_read_reg(padap, A_TP_PMM_TX_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

933

t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

935

G_PMTXMAXPAGE(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

940

md->base = t4_read_reg(padap, A_TP_PMM_RX_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

942

t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

944

G_PMRXMAXPAGE(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

948

if (t4_read_reg(padap, A_LE_DB_CONFIG) & F_HASHEN) {

sys/dev/cxgbe/cudbg/cudbg_lib.c

950

hi = t4_read_reg(padap, A_LE_DB_TID_HASHBASE) / 4;

sys/dev/cxgbe/cudbg/cudbg_lib.c

951

md->base = t4_read_reg(padap, A_LE_DB_HASH_TID_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

953

hi = t4_read_reg(padap, A_LE_DB_HASH_TID_BASE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

954

md->base = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

965

md->base = t4_read_reg(padap, A_ULP_ ## reg ## _LLIMIT);\

sys/dev/cxgbe/cudbg/cudbg_lib.c

966

(md++)->limit = t4_read_reg(padap, A_ULP_ ## reg ## _ULIMIT);\

sys/dev/cxgbe/cudbg/cudbg_lib.c

981

u32 sge_ctrl = t4_read_reg(padap, A_SGE_CONTROL2);

sys/dev/cxgbe/cudbg/cudbg_lib.c

982

u32 fifo_size = t4_read_reg(padap, A_SGE_DBVFIFO_SIZE);

sys/dev/cxgbe/cudbg/cudbg_lib.c

990

md->base = G_BASEADDR(t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_lib.c

998

md->base = t4_read_reg(padap, A_ULP_RX_CTX_BASE);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1006

value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1013

value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1039

value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1049

value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1060

value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1068

value = t4_read_reg(padap, 0x30f20 + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1076

value = t4_read_reg(padap, 0x30f60 + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1083

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1090

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1096

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1114

value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1123

value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1138

value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1158

value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1164

value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1170

value = t4_read_reg(padap, 0x30e20 + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1177

value = t4_read_reg(padap, 0x30e60 + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1190

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1194

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1197

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1201

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1205

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1209

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1212

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1216

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1220

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1231

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1235

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1239

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1243

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1247

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1251

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1255

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1259

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1263

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1267

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1271

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

1275

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

264

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_LOW);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

267

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

332

value = t4_read_reg(padap, A_PCIE_CMDR_REQ_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

342

value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT3 + (i * 0x10));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

348

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_6);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

359

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_3);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

371

value = t4_read_reg(padap, A_ULP_TX_SE_CNT_CH0 + (i * 4));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

378

value = t4_read_reg(padap, 0x3081c + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

387

value = t4_read_reg(padap, 0x30a80 + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

393

value = t4_read_reg(padap, A_PCIE_CMDR_RSP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

438

value = t4_read_reg(padap, A_PCIE_DMAR_REQ_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

451

value = t4_read_reg(padap, A_PCIE_DMAR_RSP_SOP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

458

value = t4_read_reg(padap, A_PCIE_DMAR_RSP_EOP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

489

value = t4_read_reg(padap, (A_ULP_TX_SE_CNT_CH0 + (i*4)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

528

value = t4_read_reg(padap, 0x5988 + (i * 0x10));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

535

value = t4_read_reg(padap, 0x598c + (i * 0x10));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

542

value = t4_read_reg(padap, (A_ULP_RX_SE_CNT_CH0 + (i*4)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

553

value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_TP01 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

574

value = t4_read_reg(padap, (A_MPS_TX_SE_CNT_MAC01 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

583

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

596

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

609

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

624

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

638

value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_IN0 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

644

value = t4_read_reg(padap, (A_MPS_RX_CLS_DROP_CNT0 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

653

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

657

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

660

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

664

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

668

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

672

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

675

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

679

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

683

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

694

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

698

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

702

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

706

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

710

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

714

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

718

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

722

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

726

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

730

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

734

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

738

value = t4_read_reg(padap,

sys/dev/cxgbe/cudbg/cudbg_wtp.c

746

value = t4_read_reg(padap, (A_MPS_RX_SE_CNT_OUT01 + (i << 2)));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

826

value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

835

value = t4_read_reg(padap, 0x30a88 + ((i * 4) << 12));

sys/dev/cxgbe/cudbg/cudbg_wtp.c

841

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

852

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_1);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

869

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

878

value = t4_read_reg(padap, A_LE_DB_REQ_RSP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

892

value = t4_read_reg(padap, A_PCIE_DMAW_SOP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

899

value = t4_read_reg(padap, A_PCIE_DMAW_EOP_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

906

value = t4_read_reg(padap, A_PCIE_DMAI_CNT);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

964

value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT2);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

968

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_7);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

974

value = t4_read_reg(padap, A_PCIE_T5_CMD_STAT3);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

992

value = t4_read_reg(padap, A_SGE_DEBUG_DATA_HIGH_INDEX_9);

sys/dev/cxgbe/cudbg/cudbg_wtp.c

997

value = t4_read_reg(padap, A_PCIE_T5_DMA_STAT2 + (i * 0x10));

sys/dev/cxgbe/cxgbei/cxgbei.c

101

rx_len = t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE);

sys/dev/cxgbe/cxgbei/cxgbei.c

102

tx_len = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE);

sys/dev/cxgbe/cxgbei/cxgbei.c

104

r = t4_read_reg(sc, A_TP_PARA_REG2);

sys/dev/cxgbe/cxgbei/cxgbei.c

108

r = t4_read_reg(sc, A_TP_PARA_REG7);

sys/dev/cxgbe/cxgbei/cxgbei.c

159

r = t4_read_reg(sc, A_ULP_RX_ISCSI_PSZ);

sys/dev/cxgbe/cxgbei/icl_cxgbei.c

984

em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/nvmf/nvmf_che.c

3120

rx_len = t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE);

sys/dev/cxgbe/nvmf/nvmf_che.c

3121

tx_len = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE);

sys/dev/cxgbe/nvmf/nvmf_che.c

3123

r = t4_read_reg(sc, A_TP_PARA_REG2);

sys/dev/cxgbe/nvmf/nvmf_che.c

3127

r = t4_read_reg(sc, A_TP_PARA_REG7);

sys/dev/cxgbe/nvmf/nvmf_che.c

3152

val = t4_read_reg(sc, A_SGE_CONTROL2);

sys/dev/cxgbe/t4_filter.c

737

tcb_addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE) + tid * TCB_SIZE;

sys/dev/cxgbe/t4_main.c

10306

map = t4_read_reg(sc, A_TP_TX_MOD_QUEUE_REQ_MAP);

sys/dev/cxgbe/t4_main.c

10307

mode = G_TIMERMODE(t4_read_reg(sc, A_TP_MOD_CONFIG));

sys/dev/cxgbe/t4_main.c

10502

lo = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/t4_main.c

10504

hi = t4_read_reg(sc, A_MA_EDRAM0_BAR);

sys/dev/cxgbe/t4_main.c

10518

hi = t4_read_reg(sc, A_MA_EDRAM1_BAR);

sys/dev/cxgbe/t4_main.c

10535

hi = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);

sys/dev/cxgbe/t4_main.c

10542

hi = t4_read_reg(sc, A_MA_EXT_MEMORY0_BAR);

sys/dev/cxgbe/t4_main.c

10549

hi = t4_read_reg(sc, A_MA_EXT_MEMORY0_BAR);

sys/dev/cxgbe/t4_main.c

10562

hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);

sys/dev/cxgbe/t4_main.c

10580

hi = t4_read_reg(sc, A_MA_HOST_MEMORY_BAR);

sys/dev/cxgbe/t4_main.c

10585

hi = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);

sys/dev/cxgbe/t4_main.c

10599

(md++)->base = t4_read_reg(sc, A_SGE_DBQ_CTXT_BADDR);

sys/dev/cxgbe/t4_main.c

10600

(md++)->base = t4_read_reg(sc, A_SGE_IMSG_CTXT_BADDR);

sys/dev/cxgbe/t4_main.c

10601

(md++)->base = t4_read_reg(sc, A_SGE_FLM_CACHE_BADDR);

sys/dev/cxgbe/t4_main.c

10602

(md++)->base = t4_read_reg(sc, A_TP_CMM_TCB_BASE);

sys/dev/cxgbe/t4_main.c

10603

(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_BASE);

sys/dev/cxgbe/t4_main.c

10604

(md++)->base = t4_read_reg(sc, A_TP_CMM_TIMER_BASE);

sys/dev/cxgbe/t4_main.c

10605

(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_RX_FLST_BASE);

sys/dev/cxgbe/t4_main.c

10606

(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_TX_FLST_BASE);

sys/dev/cxgbe/t4_main.c

10607

(md++)->base = t4_read_reg(sc, A_TP_CMM_MM_PS_FLST_BASE);

sys/dev/cxgbe/t4_main.c

10610

md->base = t4_read_reg(sc, A_TP_PMM_TX_BASE);

sys/dev/cxgbe/t4_main.c

10612

t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE) *

sys/dev/cxgbe/t4_main.c

10613

G_PMTXMAXPAGE(t4_read_reg(sc, A_TP_PMM_TX_MAX_PAGE));

sys/dev/cxgbe/t4_main.c

10616

md->base = t4_read_reg(sc, A_TP_PMM_RX_BASE);

sys/dev/cxgbe/t4_main.c

10618

t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE) *

sys/dev/cxgbe/t4_main.c

10619

G_PMRXMAXPAGE(t4_read_reg(sc, A_TP_PMM_RX_MAX_PAGE));

sys/dev/cxgbe/t4_main.c

10622

if (t4_read_reg(sc, A_LE_DB_CONFIG) & F_HASHEN) {

sys/dev/cxgbe/t4_main.c

10624

md->base = t4_read_reg(sc, A_LE_DB_HASH_TID_BASE);

sys/dev/cxgbe/t4_main.c

10626

md->base = t4_read_reg(sc, A_LE_DB_HASH_TBL_BASE_ADDR);

sys/dev/cxgbe/t4_main.c

10636

md->base = (uint64_t)t4_read_reg(sc, A_ULP_ ## reg ## _LLIMIT) << shift; \

sys/dev/cxgbe/t4_main.c

10637

md->limit = (uint64_t)t4_read_reg(sc, A_ULP_ ## reg ## _ULIMIT) << shift; \

sys/dev/cxgbe/t4_main.c

10686

uint32_t sge_ctrl = t4_read_reg(sc, A_SGE_CONTROL2);

sys/dev/cxgbe/t4_main.c

10687

uint32_t fifo_size = t4_read_reg(sc, A_SGE_DBVFIFO_SIZE);

sys/dev/cxgbe/t4_main.c

10696

md->base = t4_read_reg(sc, A_SGE_DBVFIFO_BADDR);

sys/dev/cxgbe/t4_main.c

10703

md->base = t4_read_reg(sc, A_ULP_RX_CTX_BASE);

sys/dev/cxgbe/t4_main.c

10706

md->base = t4_read_reg(sc, A_ULP_TX_ERR_TABLE_BASE);

sys/dev/cxgbe/t4_main.c

10751

lo = t4_read_reg(sc, A_CIM_SDRAM_BASE_ADDR);

sys/dev/cxgbe/t4_main.c

10752

hi = t4_read_reg(sc, A_CIM_SDRAM_ADDR_SIZE) + lo - 1;

sys/dev/cxgbe/t4_main.c

10758

lo = t4_read_reg(sc, A_CIM_EXTMEM2_BASE_ADDR);

sys/dev/cxgbe/t4_main.c

10759

hi = t4_read_reg(sc, A_CIM_EXTMEM2_ADDR_SIZE) + lo - 1;

sys/dev/cxgbe/t4_main.c

10763

lo = t4_read_reg(sc, A_TP_PMM_RX_MAX_PAGE);

sys/dev/cxgbe/t4_main.c

10769

free += G_FREERXPAGECOUNT(t4_read_reg(sc, A_TP_FLM_FREE_RX_CNT));

sys/dev/cxgbe/t4_main.c

10772

t4_read_reg(sc, A_TP_PMM_RX_PAGE_SIZE) >> 10, nchan);

sys/dev/cxgbe/t4_main.c

10774

lo = t4_read_reg(sc, A_TP_PMM_TX_MAX_PAGE);

sys/dev/cxgbe/t4_main.c

10775

hi = t4_read_reg(sc, A_TP_PMM_TX_PAGE_SIZE);

sys/dev/cxgbe/t4_main.c

10781

free += G_FREETXPAGECOUNT(t4_read_reg(sc, A_TP_FLM_FREE_TX_CNT));

sys/dev/cxgbe/t4_main.c

10787

t4_read_reg(sc, A_TP_CMM_MM_MAX_PSTRUCT),

sys/dev/cxgbe/t4_main.c

10788

G_FREEPSTRUCTCOUNT(t4_read_reg(sc, A_TP_FLM_FREE_PS_CNT)));

sys/dev/cxgbe/t4_main.c

10792

lo = t4_read_reg(sc, A_MPS_RX_MAC_BG_PG_CNT0 + i * 4);

sys/dev/cxgbe/t4_main.c

10794

lo = t4_read_reg(sc, A_MPS_RX_PG_RSV0 + i * 4);

sys/dev/cxgbe/t4_main.c

10808

lo = t4_read_reg(sc, A_MPS_RX_LPBK_BG_PG_CNT0 + i * 4);

sys/dev/cxgbe/t4_main.c

10810

lo = t4_read_reg(sc, A_MPS_RX_PG_RSV4 + i * 4);

sys/dev/cxgbe/t4_main.c

10878

cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));

sys/dev/cxgbe/t4_main.c

10879

cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i));

sys/dev/cxgbe/t4_main.c

10976

val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);

sys/dev/cxgbe/t4_main.c

10978

tcamy |= t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);

sys/dev/cxgbe/t4_main.c

10979

data2 = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11006

val = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA1_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11008

tcamx |= t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA0_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11009

data2 = t4_read_reg(sc, A_MPS_CLS_TCAM_RDATA2_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11030

cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));

sys/dev/cxgbe/t4_main.c

11031

cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i));

sys/dev/cxgbe/t4_main.c

11170

val = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA1_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11172

tcamy |= t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA0_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11173

data2 = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA2_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11200

val = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA1_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11202

tcamx |= t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA0_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11203

data2 = t4_read_reg(sc, A_MPS_CLS_TCAM0_RDATA2_REQ_ID1);

sys/dev/cxgbe/t4_main.c

11225

cls_lo = t4_read_reg(sc, MPS_CLS_SRAM_L(i));

sys/dev/cxgbe/t4_main.c

11226

cls_hi = t4_read_reg(sc, MPS_CLS_SRAM_H(i));

sys/dev/cxgbe/t4_main.c

11230

cls_lo = t4_read_reg(sc, A_MPS_CLS_SRAM_L);

sys/dev/cxgbe/t4_main.c

11231

cls_hi = t4_read_reg(sc, A_MPS_CLS_SRAM_H);

sys/dev/cxgbe/t4_main.c

11581

else if (t4_read_reg(sc, A_LE_DB_CONFIG) & F_HASHEN) {

sys/dev/cxgbe/t4_main.c

11584

x = t4_read_reg(sc, A_LE_DB_SERVER_INDEX) / 4;

sys/dev/cxgbe/t4_main.c

11585

y = t4_read_reg(sc, A_LE_DB_TID_HASHBASE) / 4;

sys/dev/cxgbe/t4_main.c

11587

x = t4_read_reg(sc, A_LE_DB_SRVR_START_INDEX);

sys/dev/cxgbe/t4_main.c

11588

y = t4_read_reg(sc, A_T6_LE_DB_HASH_TID_BASE);

sys/dev/cxgbe/t4_main.c

11627

x = t4_read_reg(sc, A_LE_DB_ACT_CNT_IPV4);

sys/dev/cxgbe/t4_main.c

11628

y = t4_read_reg(sc, A_LE_DB_ACT_CNT_IPV6);

sys/dev/cxgbe/t4_main.c

12006

switch (G_DBGLAMODE(t4_read_reg(sc, A_TP_DBG_LA_CONFIG))) {

sys/dev/cxgbe/t4_main.c

12131

cfg = t4_read_reg(sc, A_SGE_STAT_CFG);

sys/dev/cxgbe/t4_main.c

12132

s1 = t4_read_reg(sc, A_SGE_STAT_TOTAL);

sys/dev/cxgbe/t4_main.c

12133

s2 = t4_read_reg(sc, A_SGE_STAT_MATCH);

sys/dev/cxgbe/t4_main.c

12312

res = t4_read_reg(sc, A_TP_TIMER_RESOLUTION);

sys/dev/cxgbe/t4_main.c

12352

dack_re = G_DELAYEDACKRESOLUTION(t4_read_reg(sc,

sys/dev/cxgbe/t4_main.c

12354

dack_tmr = t4_read_reg(sc, A_TP_DACK_TIMER);

sys/dev/cxgbe/t4_main.c

12384

tre = G_TIMERRESOLUTION(t4_read_reg(sc, A_TP_TIMER_RESOLUTION));

sys/dev/cxgbe/t4_main.c

12387

v = tp_tick_us * G_INITSRTT(t4_read_reg(sc, reg));

sys/dev/cxgbe/t4_main.c

12389

v = tp_tick_us * t4_read_reg(sc, reg);

sys/dev/cxgbe/t4_main.c

12416

v = (t4_read_reg(sc, A_TP_SHIFT_CNT) >> idx) & 0xf;

sys/dev/cxgbe/t4_main.c

12441

v = (t4_read_reg(sc, r) >> shift) & M_TIMERBACKOFFINDEX0;

sys/dev/cxgbe/t4_main.c

12643

offset = G_OFFSET(t4_read_reg(sc, PF_REG(br->pfidx_addr,

sys/dev/cxgbe/t4_main.c

13271

edata->val = t4_read_reg(sc, edata->addr);

sys/dev/cxgbe/t4_main.c

13861

save = t4_read_reg(sc, reg);

sys/dev/cxgbe/t4_main.c

13875

t4_read_reg(sc, reg);

sys/dev/cxgbe/t4_main.c

13880

buf[j] = htonl(t4_read_reg(sc, base + off));

sys/dev/cxgbe/t4_main.c

13892

t4_read_reg(sc, reg);

sys/dev/cxgbe/t4_main.c

13901

tcb_addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE);

sys/dev/cxgbe/t4_main.c

1411

j = t4_read_reg(sc, A_PL_WHOAMI);

sys/dev/cxgbe/t4_main.c

2090

val = t4_read_reg(sc, A_PL_WHOAMI);

sys/dev/cxgbe/t4_main.c

4147

t4_read_reg(sc, reg);

sys/dev/cxgbe/t4_main.c

4181

t4_read_reg(sc, reg); /* flush */

sys/dev/cxgbe/t4_main.c

4215

v = t4_read_reg(sc, mw->mw_base + addr -

sys/dev/cxgbe/t4_main.c

4389

em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/t4_main.c

4395

addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR);

sys/dev/cxgbe/t4_main.c

4407

addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR);

sys/dev/cxgbe/t4_main.c

4419

addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);

sys/dev/cxgbe/t4_main.c

4431

addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);

sys/dev/cxgbe/t4_main.c

4533

em = t4_read_reg(sc, A_MA_TARGET_MEM_ENABLE);

sys/dev/cxgbe/t4_main.c

4538

addr_len = t4_read_reg(sc, A_MA_EDRAM0_BAR);

sys/dev/cxgbe/t4_main.c

4544

addr_len = t4_read_reg(sc, A_MA_EDRAM1_BAR);

sys/dev/cxgbe/t4_main.c

4550

addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY_BAR);

sys/dev/cxgbe/t4_main.c

4556

addr_len = t4_read_reg(sc, A_MA_EXT_MEMORY1_BAR);

sys/dev/cxgbe/t4_main.c

5184

"PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW));

sys/dev/cxgbe/t4_main.c

5211

"PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW));

sys/dev/cxgbe/t4_main.c

5220

"PCIE_FW 0x%08x\n", rc, state, t4_read_reg(sc, A_PCIE_FW));

sys/dev/cxgbe/t4_main.c

5680

sc->tids.tid_base = t4_read_reg(sc,

sys/dev/cxgbe/t4_main.c

6075

val = 1 << (G_MASKSIZE(t4_read_reg(sc, A_TP_RSS_CONFIG_TNL)) - 1);

sys/dev/cxgbe/t4_main.c

7564

stats[0] = t4_read_reg(sc, VF_MPS_REG(reg));

sys/dev/cxgbe/t4_main.c

7565

stats[1] = t4_read_reg(sc, VF_MPS_REG(reg + 4));

sys/dev/cxgbe/t4_main.c

7570

stats[0] = t4_read_reg(sc, A_PL_INDIR_DATA);

sys/dev/cxgbe/t4_main.c

7571

stats[1] = t4_read_reg(sc, A_PL_INDIR_DATA);

sys/dev/cxgbe/t4_main.c

9655

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0),

sys/dev/cxgbe/t4_main.c

9656

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1),

sys/dev/cxgbe/t4_main.c

9657

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA2),

sys/dev/cxgbe/t4_main.c

9658

t4_read_reg(sc, A_EDC_H_BIST_DATA_PATTERN),

sys/dev/cxgbe/t4_main.c

9659

t4_read_reg(sc, A_EDC_H_BIST_STATUS_RDATA));

sys/dev/cxgbe/t4_main.c

9662

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0),

sys/dev/cxgbe/t4_main.c

9663

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1),

sys/dev/cxgbe/t4_main.c

9664

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA0 + 0x800),

sys/dev/cxgbe/t4_main.c

9665

t4_read_reg(sc, A_EDC_H_BIST_USER_WDATA1 + 0x800),

sys/dev/cxgbe/t4_main.c

9666

t4_read_reg(sc, A_EDC_H_BIST_CMD_LEN));

sys/dev/cxgbe/t4_sge.c

1005

r = t4_read_reg(sc, A_TP_PARA_REG5);

sys/dev/cxgbe/t4_sge.c

1352

v = t4_read_reg(sc, MYPF_REG(A_PL_PF_INT_CAUSE));

sys/dev/cxgbe/t4_sge.c

987

r = t4_read_reg(sc, A_ULP_RX_TDDP_PSZ);

sys/dev/cxgbe/t4_sge.c

995

r = t4_read_reg(sc, A_ULP_RX_CTL);

sys/dev/cxgbe/t4_vf.c

851

edata->val = t4_read_reg(sc, edata->addr);

sys/dev/cxgbe/tom/t4_tom.c

1547

td->dupack_threshold = G_DUPACKTHRESH(t4_read_reg(sc, A_TP_PARA_REG0));

sys/dev/cxgbe/tom/t4_tom.c

1934

t4_read_reg(sc, A_ULP_RX_TDDP_PSZ), "TDDP page pods");

sys/dev/cxgbe/tom/t4_tom.c

799

addr = t4_read_reg(sc, A_TP_CMM_TCB_BASE) + tid * TCB_SIZE;