smc_write_2
smc_write_2(sc, TCR, tcr);
smc_write_2(sc, RCR, RCR_SOFT_RST);
smc_write_2(sc, CR, CR_EPH_POWER_EN);
smc_write_2(sc, TCR, 0);
smc_write_2(sc, RCR, 0);
smc_write_2(sc, CTRL, ctr);
smc_write_2(sc, MMUCR, MMUCR_CMD_MMU_RESET);
smc_write_2(sc, RPCR, RPCR_ANEG | (RPCR_LED_LINK_ANY << RPCR_LSA_SHIFT)
smc_write_2(sc, TCR, TCR_TXENA | TCR_PAD_EN);
smc_write_2(sc, RCR, RCR_RXEN | RCR_STRIP_CRC);
smc_write_2(sc, TCR, 0);
smc_write_2(sc, RCR, 0);
smc_write_2(sc, MMUCR, MMUCR_CMD_TX_ALLOC | npages);
smc_write_2(sc, PTR, 0 | PTR_AUTO_INCR);
smc_write_2(sc, DATA0, 0);
smc_write_2(sc, DATA0, len);
smc_write_2(sc, DATA0, (CTRL_ODD << 8) | data[last_len - 1]);
smc_write_2(sc, DATA0, 0);
smc_write_2(sc, MMUCR, MMUCR_CMD_ENQUEUE);
smc_write_2(sc, PTR, 0 | PTR_READ | PTR_RCV | PTR_AUTO_INCR);
smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE);
smc_write_2(sc, PTR, 4 | PTR_READ | PTR_RCV | PTR_AUTO_INCR);
smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE);
smc_write_2(sc, PTR, 0 | PTR_READ |
smc_write_2(sc, MMUCR, MMUCR_CMD_RELEASE_PKT);
smc_write_2(sc, TCR, tcr);
smc_write_2(sc, MGMT, val);