sys/x86/iommu/intel_ctx.c

177

if (iommu_is_buswide_ctx(DMAR2IOMMU(unit), busno)) {

sys/x86/iommu/intel_ctx.c

375

unit = DMAR2IOMMU(dmar);

sys/x86/iommu/intel_ctx.c

524

unit = DMAR2IOMMU(dmar);

sys/x86/iommu/intel_dmar.h

150

#define DMAR_LOCK(dmar) mtx_lock(&DMAR2IOMMU(dmar)->lock)

sys/x86/iommu/intel_dmar.h

151

#define DMAR_UNLOCK(dmar) mtx_unlock(&DMAR2IOMMU(dmar)->lock)

sys/x86/iommu/intel_dmar.h

152

#define DMAR_ASSERT_LOCKED(dmar) mtx_assert(&DMAR2IOMMU(dmar)->lock, MA_OWNED)

sys/x86/iommu/intel_drv.c

275

iommu_release_intr(DMAR2IOMMU(unit), i);

sys/x86/iommu/intel_drv.c

316

(dmd->disable_intr)(DMAR2IOMMU(unit));

sys/x86/iommu/intel_drv.c

321

(dmd->enable_intr)(DMAR2IOMMU(unit));

sys/x86/iommu/intel_drv.c

410

error = iommu_alloc_irq(DMAR2IOMMU(unit), DMAR_INTR_FAULT);

sys/x86/iommu/intel_drv.c

430

error = iommu_alloc_irq(DMAR2IOMMU(unit), DMAR_INTR_QI);

sys/x86/iommu/intel_qi.c

130

dmar_qi_advance_tail(DMAR2IOMMU(unit));

sys/x86/iommu/intel_qi.c

198

dmar_qi_ensure(DMAR2IOMMU(unit), 1);

sys/x86/iommu/intel_qi.c

205

iommu_qi_emit_wait_seq(DMAR2IOMMU(unit), pseq, emit_wait);

sys/x86/iommu/intel_qi.c

214

dmar_qi_ensure(DMAR2IOMMU(unit), 2);

sys/x86/iommu/intel_qi.c

216

iommu_qi_emit_wait_seq(DMAR2IOMMU(unit), &gseq, true);

sys/x86/iommu/intel_qi.c

219

dmar_qi_advance_tail(DMAR2IOMMU(unit));

sys/x86/iommu/intel_qi.c

220

iommu_qi_wait_for_seq(DMAR2IOMMU(unit), &gseq, false);

sys/x86/iommu/intel_qi.c

257

dmar_qi_ensure(DMAR2IOMMU(unit), 1);

sys/x86/iommu/intel_qi.c

262

dmar_qi_ensure(DMAR2IOMMU(unit), 1);

sys/x86/iommu/intel_qi.c

263

iommu_qi_emit_wait_seq(DMAR2IOMMU(unit), &gseq, true);

sys/x86/iommu/intel_qi.c

271

dmar_qi_advance_tail(DMAR2IOMMU(unit));

sys/x86/iommu/intel_qi.c

288

iommu_qi_wait_for_seq(DMAR2IOMMU(unit), &gseq, true);

sys/x86/iommu/intel_qi.c

310

iommu_qi_drain_tlb_flush(DMAR2IOMMU(unit));

sys/x86/iommu/intel_qi.c

327

iommu_qi_drain_tlb_flush(DMAR2IOMMU(unit));

sys/x86/iommu/intel_qi.c

357

iommu_qi_common_init(DMAR2IOMMU(unit), dmar_qi_task);

sys/x86/iommu/intel_qi.c

376

dmar_enable_qi_intr(DMAR2IOMMU(unit));

sys/x86/iommu/intel_qi.c

394

iommu_qi_common_fini(DMAR2IOMMU(unit), dmar_fini_qi_helper);