rx_queue
gen_rxintr(sc, &sc->rx_queue[DEF_RXQUEUE]);
gen_rxintr(struct gen_softc *sc, struct rx_queue *q)
gen_newbuf_rx(struct gen_softc *sc, struct rx_queue *q, int index)
gen_mapbuf_rx(struct gen_softc *sc, struct rx_queue *q, int index,
struct rx_queue rx_queue[NRXQUEUE];
static int gen_rxintr(struct gen_softc *sc, struct rx_queue *q);
static int gen_newbuf_rx(struct gen_softc *sc, struct rx_queue *q, int index);
static int gen_mapbuf_rx(struct gen_softc *sc, struct rx_queue *q, int index,
struct rx_queue *q;
q = &sc->rx_queue[queue];
gen_newbuf_rx(sc, &sc->rx_queue[DEF_RXQUEUE], i);
sc->rx_queue[i].queue = i;
sc->rx_queue[DEF_RXQUEUE].hwindex = GENET_DMA_DEFAULT_QUEUE;
rx_queue = &sc->rx_queues[i];
&rx_queue->irq, vector + 1, IFLIB_INTR_RXTX,
NULL, rx_queue, i, irq_name);
rx_queue = &sc->rx_queues[i];
iflib_irq_free(ctx, &rx_queue->irq);
struct enetc_rx_queue *rx_queue;
struct mbq *q = &kring->rx_queue, fq;
mbq_safe_init(&NMR(na, NR_RX)[i]->rx_queue);
q = &kring->rx_queue;
struct mbq *q = &NMR(na, NR_RX)[i]->rx_queue;
mbq_dequeue(&kring->rx_queue);
mbq_unlock(&kring->rx_queue);
mbq_safe_purge(&kring->rx_queue);
mbq_safe_fini(&kring->rx_queue);
mbq_safe_init(&kring->rx_queue);
mbq_safe_fini(&kring->rx_queue);
} else if (unlikely(mbq_len(&kring->rx_queue) > na->num_rx_desc)) {
mbq_safe_enqueue(&kring->rx_queue, m);
mbq_lock(&kring->rx_queue);
m = mbq_peek(&kring->rx_queue);
struct mbq rx_queue; /* intercepted rx mbufs. */
int rx_queue = intr->irq_rid - QCOM_ESS_EDMA_NUM_TX_IRQS;
(void) qcom_ess_edma_hw_intr_rx_intr_set_enable(sc, rx_queue,
taskqueue_enqueue(sc->sc_rx_state[rx_queue].completion_tq,
&sc->sc_rx_state[rx_queue].completion_task);
int rx_queue, struct mbufq *mq)
ring = &sc->sc_rx_ring[rx_queue];
int rx_queue,
qcom_ess_edma_hw_intr_rx_ack(struct qcom_ess_edma_softc *sc, int rx_queue)
EDMA_RING_LOCK_ASSERT(&sc->sc_rx_ring[rx_queue]);
EDMA_REG_WRITE(sc, EDMA_REG_RX_ISR, (1U << rx_queue));
int rx_queue);
&p_ll2_info->rx_queue.rxq_chain, OSAL_NULL);
capacity = ecore_chain_get_capacity(&p_ll2_info->rx_queue.rxq_chain);
p_ll2_info->rx_queue.descq_array = p_descq;
&p_ll2_info->rx_queue.rcq_chain, OSAL_NULL);
&p_ll2_info->rx_queue.rx_sb_index,
&p_ll2_info->rx_queue.p_fw_cons);
p_ll2_info->rx_queue.b_cb_registred = true;
DIRECT_REG_WR(p_hwfn, p_ll2_conn->rx_queue.set_prod_addr, 0x0);
p_rx = &p_ll2_conn->rx_queue;
p_rx = &p_ll2_conn->rx_queue;
p_ll2_conn->rx_queue.b_cb_registred = false;
p_ll2_conn->rx_queue.rx_sb_index);
OSAL_FREE(p_hwfn->p_dev, p_ll2_conn->rx_queue.descq_array);
ecore_chain_free(p_hwfn->p_dev, &p_ll2_conn->rx_queue.rxq_chain);
ecore_chain_free(p_hwfn->p_dev, &p_ll2_conn->rx_queue.rcq_chain);
if (OSAL_SPIN_LOCK_ALLOC(p_hwfn, &p_ll2_info[i].rx_queue.lock))
OSAL_SPIN_LOCK_DEALLOC(&p_hwfn->p_ll2_info[i].rx_queue.lock);
struct ecore_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
struct ecore_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
struct ecore_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
p_rx = &p_ll2_conn->rx_queue;
#define ECORE_LL2_RX_REGISTERED(ll2) ((ll2)->rx_queue.b_cb_registred)
struct ecore_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
struct ecore_ll2_rx_queue *p_rx = &p_ll2_conn->rx_queue;
struct ecore_ll2_rx_queue rx_queue;
__u32 rx_queue, tx_queue;
rx_queue = rcv_nxt(sdp_sk(sk)) - sdp_sk(sk)->copied_seq;
rx_queue, tx_queue, sk->sk_state);