qls_mpid_seg_hdr_t
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->nic1_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->nic2_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->xgmac1)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->xgmac2)),
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->serdes1_xfi_an)),
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->serdes2_xfi_an)),
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->rmii_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->fcmac1_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->fcmac2_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->fc1_mbx_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->ide_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->nic1_mbx_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->smbus_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->fc2_mbx_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->nic2_mbx_regs)),
(sizeof(qls_mpid_seg_hdr_t) +
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->memc_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->pbus_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->mde_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->intr_states)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->probe_dump)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->routing_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->mac_prot_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->ets)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->sem_regs)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->memc_ram)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->code_ram)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->wqc1)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->wqc2)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->cqc1)),
(sizeof(qls_mpid_seg_hdr_t) + sizeof(mpi_dump->cqc2)),
qls_mpid_seg_hdr(qls_mpid_seg_hdr_t *seg_hdr, uint32_t seg_num,
memset(seg_hdr, 0, sizeof(qls_mpid_seg_hdr_t));
qls_mpid_seg_hdr_t core_regs_seg_hdr;
qls_mpid_seg_hdr_t test_logic_regs_seg_hdr;
qls_mpid_seg_hdr_t rmii_regs_seg_hdr;
qls_mpid_seg_hdr_t fcmac1_regs_seg_hdr;
qls_mpid_seg_hdr_t fcmac2_regs_seg_hdr;
qls_mpid_seg_hdr_t fc1_mbx_regs_seg_hdr;
qls_mpid_seg_hdr_t ide_regs_seg_hdr;
qls_mpid_seg_hdr_t nic1_mbx_regs_seg_hdr;
qls_mpid_seg_hdr_t smbus_regs_seg_hdr;
qls_mpid_seg_hdr_t fc2_mbx_regs_seg_hdr;
qls_mpid_seg_hdr_t nic2_mbx_regs_seg_hdr;
qls_mpid_seg_hdr_t i2c_regs_seg_hdr;
qls_mpid_seg_hdr_t memc_regs_seg_hdr;
qls_mpid_seg_hdr_t pbus_regs_seg_hdr;
qls_mpid_seg_hdr_t mde_regs_seg_hdr;
qls_mpid_seg_hdr_t xaui1_an_hdr;
qls_mpid_seg_hdr_t xaui1_hss_pcs_hdr;
qls_mpid_seg_hdr_t xfi1_an_hdr;
qls_mpid_seg_hdr_t xfi1_train_hdr;
qls_mpid_seg_hdr_t xfi1_hss_pcs_hdr;
qls_mpid_seg_hdr_t xfi1_hss_tx_hdr;
qls_mpid_seg_hdr_t xfi1_hss_rx_hdr;
qls_mpid_seg_hdr_t xfi1_hss_pll_hdr;
qls_mpid_seg_hdr_t xaui2_an_hdr;
qls_mpid_seg_hdr_t xaui2_hss_pcs_hdr;
qls_mpid_seg_hdr_t xfi2_an_hdr;
qls_mpid_seg_hdr_t xfi2_train_hdr;
qls_mpid_seg_hdr_t xfi2_hss_pcs_hdr;
qls_mpid_seg_hdr_t xfi2_hss_tx_hdr;
qls_mpid_seg_hdr_t xfi2_hss_rx_hdr;
qls_mpid_seg_hdr_t xfi2_hss_pll_hdr;
qls_mpid_seg_hdr_t nic1_regs_seg_hdr;
qls_mpid_seg_hdr_t nic2_regs_seg_hdr;
qls_mpid_seg_hdr_t intr_states_seg_hdr;
qls_mpid_seg_hdr_t xgmac1_seg_hdr;
qls_mpid_seg_hdr_t xgmac2_seg_hdr;
qls_mpid_seg_hdr_t probe_dump_seg_hdr;
qls_mpid_seg_hdr_t routing_reg_seg_hdr;
qls_mpid_seg_hdr_t mac_prot_reg_seg_hdr;
qls_mpid_seg_hdr_t sem_regs_seg_hdr;
qls_mpid_seg_hdr_t ets_seg_hdr;
qls_mpid_seg_hdr_t wqc1_seg_hdr;
qls_mpid_seg_hdr_t cqc1_seg_hdr;
qls_mpid_seg_hdr_t wqc2_seg_hdr;
qls_mpid_seg_hdr_t cqc2_seg_hdr;
qls_mpid_seg_hdr_t code_ram_seg_hdr;
qls_mpid_seg_hdr_t memc_ram_seg_hdr;