Symbol: rd32
sys/dev/iavf/iavf_adminq.c
299
reg = rd32(hw, hw->aq.asq.bal);
sys/dev/iavf/iavf_adminq.c
331
reg = rd32(hw, hw->aq.arq.bal);
sys/dev/iavf/iavf_adminq.c
618
while (rd32(hw, hw->aq.asq.head) != ntc) {
sys/dev/iavf/iavf_adminq.c
620
"ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));
sys/dev/iavf/iavf_adminq.c
655
return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;
sys/dev/iavf/iavf_adminq.c
695
val = rd32(hw, hw->aq.asq.head);
sys/dev/iavf/iavf_adminq.c
852
if (rd32(hw, hw->aq.asq.len) & IAVF_VF_ATQLEN1_ATQCRIT_MASK) {
sys/dev/iavf/iavf_adminq.c
922
ntu = rd32(hw, hw->aq.arq.head) & IAVF_VF_ARQH1_ARQH_MASK;
sys/dev/iavf/iavf_common.c
360
return !!(rd32(hw, hw->aq.asq.len) &
sys/dev/iavf/iavf_lib.c
1115
hena = (u64)rd32(hw, IAVF_VFQF_HENA(0)) |
sys/dev/iavf/iavf_lib.c
1116
((u64)rd32(hw, IAVF_VFQF_HENA(1)) << 32);
sys/dev/iavf/iavf_lib.c
205
reg = rd32(hw, IAVF_VFGEN_RSTAT) &
sys/dev/iavf/iavf_lib.c
376
rd32(hw, IAVF_VFGEN_RSTAT);
sys/dev/iavf/iavf_osdep.c
376
rd32(hw, osdep->flush_reg);
sys/dev/iavf/if_iavf_iflib.c
1133
oldreg = reg = rd32(hw, hw->aq.arq.len);
sys/dev/iavf/if_iavf_iflib.c
1160
oldreg = reg = rd32(hw, hw->aq.asq.len);
sys/dev/iavf/if_iavf_iflib.c
1236
reg = rd32(hw, IAVF_VFINT_ICR0_ENA1);
sys/dev/iavf/if_iavf_iflib.c
1382
val = rd32(hw, IAVF_VFGEN_RSTAT) &
sys/dev/iavf/if_iavf_iflib.c
1596
reg = rd32(hw, IAVF_VFINT_ICR01);
sys/dev/iavf/if_iavf_iflib.c
1601
mask = rd32(hw, IAVF_VFINT_ICR0_ENA1);
sys/dev/iavf/if_iavf_iflib.c
1682
rd32(hw, IAVF_VFGEN_RSTAT);
sys/dev/ice/ice_common.c
1030
hw->pf_id = (u8)(rd32(hw, PF_FUNC_RID) &
sys/dev/ice/ice_common.c
1231
grst_timeout = ((rd32(hw, GLGEN_RSTCTL) & GLGEN_RSTCTL_GRSTDEL_M) >>
sys/dev/ice/ice_common.c
1236
reg = rd32(hw, GLGEN_RSTAT);
sys/dev/ice/ice_common.c
1261
reg = rd32(hw, GLNVM_ULD) & uld_mask;
sys/dev/ice/ice_common.c
1294
if ((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) ||
sys/dev/ice/ice_common.c
1295
(rd32(hw, GLNVM_ULD) & ICE_RESET_DONE_MASK) ^ ICE_RESET_DONE_MASK) {
sys/dev/ice/ice_common.c
1304
reg = rd32(hw, PFGEN_CTRL);
sys/dev/ice/ice_common.c
1316
reg = rd32(hw, PFGEN_CTRL);
sys/dev/ice/ice_common.c
1362
val |= rd32(hw, GLGEN_RTRIG);
sys/dev/ice/ice_common.c
1424
*ctx = rd32(hw, QRX_CONTEXT(i, rxq_index));
sys/dev/ice/ice_common.c
5945
new_data = rd32(hw, reg);
sys/dev/ice/ice_common.c
6010
repc = rd32(hw, GLV_REPC(vsi_num));
sys/dev/ice/ice_common.c
6181
fw_mode = rd32(hw, GL_MNG_FWSM) & E800_GL_MNG_FWSM_FW_MODES_M;
sys/dev/ice/ice_common.c
796
val = rd32(hw, E830_PRTMAC_CL01_PAUSE_QUANTA);
sys/dev/ice/ice_common.c
801
val = rd32(hw, E830_PRTMAC_CL01_QUANTA_THRESH);
sys/dev/ice/ice_common.c
805
val = rd32(hw, E800_PRTMAC_HSEC_CTL_TX_PAUSE_QUANTA(E800_IDX_OF_LFC));
sys/dev/ice/ice_common.c
811
val = rd32(hw, E800_PRTMAC_HSEC_CTL_TX_PAUSE_REFRESH_TIMER(E800_IDX_OF_LFC));
sys/dev/ice/ice_common.c
962
u8 max_agg_bw = (rd32(hw, GL_PWR_MODE_CTL) &
sys/dev/ice/ice_controlq.c
1005
return rd32(hw, cq->sq.head) == cq->sq.next_to_use;
sys/dev/ice/ice_controlq.c
1064
val = rd32(hw, cq->sq.head);
sys/dev/ice/ice_controlq.c
110
return (rd32(hw, cq->sq.len) & (cq->sq.len_mask |
sys/dev/ice/ice_controlq.c
1171
if (rd32(hw, cq->rq.len) & cq->rq.len_crit_mask ||
sys/dev/ice/ice_controlq.c
1172
rd32(hw, cq->sq.len) & cq->sq.len_crit_mask) {
sys/dev/ice/ice_controlq.c
1269
ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);
sys/dev/ice/ice_controlq.c
1324
ntu = (u16)(rd32(hw, cq->rq.head) & cq->rq.head_mask);
sys/dev/ice/ice_controlq.c
280
if (rd32(hw, ring->bal) != ICE_LO_DWORD(ring->desc_buf.pa))
sys/dev/ice/ice_controlq.c
886
head = rd32(hw, sq->head);
sys/dev/ice/ice_controlq.c
904
head = rd32(hw, sq->head);
sys/dev/ice/ice_dcb.c
280
reg = rd32(hw, PRTDCB_GENS);
sys/dev/ice/ice_ddp_common.c
2528
reg = rd32(hw, GLGEN_RSTAT);
sys/dev/ice/ice_iov.c
491
reg = rd32(hw, GLGEN_VFLRSTAT(reg_idx));
sys/dev/ice/ice_iov.c
513
reg = rd32(hw, VPGEN_VFRTRIG(vf->vf_num));
sys/dev/ice/ice_iov.c
552
reg = rd32(hw, VPGEN_VFRTRIG(vf->vf_num));
sys/dev/ice/ice_iov.c
568
reg = rd32(hw, PF_PCI_CIAD);
sys/dev/ice/ice_iov.c
589
reg = rd32(hw, VPGEN_VFRSTAT(vf->vf_num));
sys/dev/ice/ice_lib.c
10866
(rd32(hw, PRTDCB_GENC) & PRTDCB_GENC_NUMTC_M)
sys/dev/ice/ice_lib.c
10869
(rd32(hw, PRTDCB_TUP2TC)));
sys/dev/ice/ice_lib.c
10871
(rd32(hw, PRTDCB_RUP2TC)));
sys/dev/ice/ice_lib.c
10873
(rd32(hw, GLDCB_TC2PFC)));
sys/dev/ice/ice_lib.c
11161
return (rd32(hw, 0xB81E0) & 0x4);
sys/dev/ice/ice_lib.c
1489
val = rd32(hw, QINT_RQCTL(reg));
sys/dev/ice/ice_lib.c
1526
val = rd32(hw, QINT_TQCTL(reg));
sys/dev/ice/ice_lib.c
1768
regval = rd32(hw, QRXFLXP_CNTXT(pf_q));
sys/dev/ice/ice_lib.c
1842
qrx_ctrl = rd32(hw, QRX_CTRL(pf_q));
sys/dev/ice/ice_lib.c
2158
val = rd32(hw, cq->rq.len);
sys/dev/ice/ice_lib.c
2177
val = rd32(hw, cq->sq.len);
sys/dev/ice/ice_lib.c
4741
info = rd32(hw, PFHMC_ERRORINFO);
sys/dev/ice/ice_lib.c
4742
data = rd32(hw, PFHMC_ERRORDATA);
sys/dev/ice/ice_lib.c
5272
rd32(hw, PFINT_OICR);
sys/dev/ice/ice_lib.c
6442
if (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_DEVSTATE_M) {
sys/dev/ice/ice_lib.c
8342
reg = rd32(hw, GL_MDET_TX_TCLAN);
sys/dev/ice/ice_lib.c
8362
reg = rd32(hw, GL_MDET_TX_PQM);
sys/dev/ice/ice_lib.c
8381
reg = rd32(hw, GL_MDET_RX);
sys/dev/ice/ice_lib.c
8404
reg = rd32(hw, PF_MDET_TX_TCLAN);
sys/dev/ice/ice_lib.c
8411
reg = rd32(hw, PF_MDET_TX_PQM);
sys/dev/ice/ice_lib.c
8418
reg = rd32(hw, PF_MDET_RX);
sys/dev/ice/ice_lib.h
905
return (u8)((rd32(hw, PF_FUNC_RID) & PF_FUNC_RID_FUNCTION_NUMBER_M) >>
sys/dev/ice/ice_nvm.c
1428
gens_stat = rd32(hw, GLNVM_GENS);
sys/dev/ice/ice_nvm.c
1435
fla = rd32(hw, GLNVM_FLA);
sys/dev/ice/ice_nvm.c
2062
data->regval = rd32(hw, cmd->offset);
sys/dev/ice/ice_osdep.h
85
uint32_t rd32(struct ice_hw *hw, uint32_t reg);
sys/dev/ice/ice_osdep.h
90
#define ice_flush(_hw) rd32((_hw), GLGEN_STAT)
sys/dev/ice/ice_rdma.c
381
up2tc = rd32(hw, PRTDCB_TUP2TC);
sys/dev/ice/ice_sched.c
1499
val = rd32(hw, GLGEN_CLKSTAT_SRC);
sys/dev/ice/ice_vf_mbx.c
299
u32 reg = rd32(hw, E830_MBX_VF_IN_FLIGHT_MSGS_AT_PF_CNT(vf_id));
sys/dev/ice/if_ice_iflib.c
1312
oicr = rd32(hw, PFINT_OICR);
sys/dev/ice/if_ice_iflib.c
1338
reset = (rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>
sys/dev/ice/if_ice_iflib.c
2201
if (rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_LOADING_M)
sys/dev/ice/if_ice_iflib.c
2888
(((rd32(hw, GLGEN_RSTAT) & GLGEN_RSTAT_RESET_TYPE_M) >>
sys/dev/ice/if_ice_iflib.c
3412
(rd32(hw, GL_MNG_FWSM) & GL_MNG_FWSM_FW_LOADING_M)) {
sys/dev/irdma/fbsd_kcompat.c
611
val = rd32(&rf->hw, GL_RDPU_CNTRL);
sys/dev/irdma/fbsd_kcompat.c
618
val = rd32(&rf->hw, GL_RDPU_CNTRL);
sys/dev/irdma/icrdma_hw.c
276
temp = rd32(vsi->dev->hw, rx_pause_enable + 4 * fn_id);
sys/dev/irdma/icrdma_hw.c
278
temp = rd32(vsi->dev->hw, tx_pause_enable + 4 * fn_id);
sys/dev/irdma/icrdma_hw.c
280
lfc &= rd32(vsi->dev->hw,
sys/dev/irdma/icrdma_hw.c
293
value = rd32(vsi->dev->hw, reg_offset);
sys/dev/irdma/icrdma_hw.c
317
pause = (rd32(vsi->dev->hw, rx_pause_enable + 4 * fn_id) >>
sys/dev/irdma/icrdma_hw.c
319
pause &= (rd32(vsi->dev->hw, tx_pause_enable + 4 * fn_id) >>
sys/dev/irdma/icrdma_hw.c
414
wqm_data = rd32(hw, GLPE_WQMTXIDXDATA);
sys/dev/irdma/icrdma_hw.c
427
wqm_data = rd32(hw, GLPE_WQMTXIDXDATA);
sys/dev/irdma/icrdma_hw.c
438
val = rd32(hw, GL_RDPU_CNTRL);
sys/dev/ixl/i40e_adminq.c
1023
if (rd32(hw, hw->aq.asq.len) & I40E_GL_ATQLEN_ATQCRIT_MASK) {
sys/dev/ixl/i40e_adminq.c
1094
ntu = rd32(hw, hw->aq.arq.head) & I40E_PF_ARQH_ARQH_MASK;
sys/dev/ixl/i40e_adminq.c
1096
ntu = rd32(hw, hw->aq.arq.head) & I40E_VF_ARQH1_ARQH_MASK;
sys/dev/ixl/i40e_adminq.c
318
reg = rd32(hw, hw->aq.asq.bal);
sys/dev/ixl/i40e_adminq.c
354
reg = rd32(hw, hw->aq.arq.bal);
sys/dev/ixl/i40e_adminq.c
789
while (rd32(hw, hw->aq.asq.head) != ntc) {
sys/dev/ixl/i40e_adminq.c
791
"ntc %d head %d.\n", ntc, rd32(hw, hw->aq.asq.head));
sys/dev/ixl/i40e_adminq.c
826
return rd32(hw, hw->aq.asq.head) == hw->aq.asq.next_to_use;
sys/dev/ixl/i40e_adminq.c
866
val = rd32(hw, hw->aq.asq.head);
sys/dev/ixl/i40e_common.c
1014
port = (rd32(hw, I40E_PFGEN_PORTNUM) & I40E_PFGEN_PORTNUM_PORT_NUM_MASK)
sys/dev/ixl/i40e_common.c
1017
ari = (rd32(hw, I40E_GLPCI_CAPSUP) & I40E_GLPCI_CAPSUP_ARI_EN_MASK) >>
sys/dev/ixl/i40e_common.c
1019
func_rid = rd32(hw, I40E_PF_FUNC_RID);
sys/dev/ixl/i40e_common.c
1166
reg_val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
sys/dev/ixl/i40e_common.c
1307
reg = rd32(hw, I40E_GLGEN_RSTAT);
sys/dev/ixl/i40e_common.c
1338
grst_del = (rd32(hw, I40E_GLGEN_RSTCTL) &
sys/dev/ixl/i40e_common.c
1345
reg = rd32(hw, I40E_GLGEN_RSTAT);
sys/dev/ixl/i40e_common.c
1357
reg = rd32(hw, I40E_GLNVM_ULD);
sys/dev/ixl/i40e_common.c
1380
reg = rd32(hw, I40E_PFGEN_CTRL);
sys/dev/ixl/i40e_common.c
1384
reg = rd32(hw, I40E_PFGEN_CTRL);
sys/dev/ixl/i40e_common.c
1387
reg2 = rd32(hw, I40E_GLGEN_RSTAT);
sys/dev/ixl/i40e_common.c
1426
val = rd32(hw, I40E_GLPCI_CNF2);
sys/dev/ixl/i40e_common.c
1432
val = rd32(hw, I40E_PFLAN_QALLOC);
sys/dev/ixl/i40e_common.c
1442
val = rd32(hw, I40E_PF_VT_PFALLOC);
sys/dev/ixl/i40e_common.c
1479
val = rd32(hw, I40E_GLLAN_TXPRE_QDIS(reg_block));
sys/dev/ixl/i40e_common.c
1528
gpio_val = rd32(hw, I40E_GLGEN_GPIO_CTL(idx));
sys/dev/ixl/i40e_common.c
399
return !!(rd32(hw, hw->aq.asq.len) &
sys/dev/ixl/i40e_common.c
402
return !!(rd32(hw, hw->aq.asq.len) &
sys/dev/ixl/i40e_common.c
5495
val = rd32(hw, I40E_GLHMC_FCOEFMAX);
sys/dev/ixl/i40e_common.c
6447
command = rd32(hw, I40E_GLGEN_MSCA(port_num));
sys/dev/ixl/i40e_common.c
6460
command = rd32(hw, I40E_GLGEN_MSRWD(port_num));
sys/dev/ixl/i40e_common.c
6496
command = rd32(hw, I40E_GLGEN_MSCA(port_num));
sys/dev/ixl/i40e_common.c
6535
command = rd32(hw, I40E_GLGEN_MSCA(port_num));
sys/dev/ixl/i40e_common.c
6560
command = rd32(hw, I40E_GLGEN_MSCA(port_num));
sys/dev/ixl/i40e_common.c
6570
command = rd32(hw, I40E_GLGEN_MSRWD(port_num));
sys/dev/ixl/i40e_common.c
6609
command = rd32(hw, I40E_GLGEN_MSCA(port_num));
sys/dev/ixl/i40e_common.c
6636
command = rd32(hw, I40E_GLGEN_MSCA(port_num));
sys/dev/ixl/i40e_common.c
6737
u32 reg_val = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(port_num));
sys/dev/ixl/i40e_common.c
6762
i = rd32(hw, I40E_PFGEN_PORTNUM);
sys/dev/ixl/i40e_common.c
7013
val = rd32(hw, I40E_PRTPM_EEE_STAT);
sys/dev/ixl/i40e_common.c
7058
*tx_counter = rd32(hw, I40E_PRTPM_TLPIC);
sys/dev/ixl/i40e_common.c
7059
*rx_counter = rd32(hw, I40E_PRTPM_RLPIC);
sys/dev/ixl/i40e_common.c
7227
val = rd32(hw, reg_addr);
sys/dev/ixl/i40e_dcb.c
52
reg = rd32(hw, I40E_PRTDCB_GENS);
sys/dev/ixl/i40e_lan_hmc.c
135
obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
sys/dev/ixl/i40e_lan_hmc.c
138
size_exp = rd32(hw, I40E_GLHMC_LANTXOBJSZ);
sys/dev/ixl/i40e_lan_hmc.c
155
obj->max_cnt = rd32(hw, I40E_GLHMC_LANQMAX);
sys/dev/ixl/i40e_lan_hmc.c
161
size_exp = rd32(hw, I40E_GLHMC_LANRXOBJSZ);
sys/dev/ixl/i40e_lan_hmc.c
178
obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEMAX);
sys/dev/ixl/i40e_lan_hmc.c
184
size_exp = rd32(hw, I40E_GLHMC_FCOEDDPOBJSZ);
sys/dev/ixl/i40e_lan_hmc.c
201
obj->max_cnt = rd32(hw, I40E_GLHMC_FCOEFMAX);
sys/dev/ixl/i40e_lan_hmc.c
207
size_exp = rd32(hw, I40E_GLHMC_FCOEFOBJSZ);
sys/dev/ixl/i40e_nvm.c
102
gtime = rd32(hw, I40E_GLVFGEN_TIMER);
sys/dev/ixl/i40e_nvm.c
118
gtime = rd32(hw, I40E_GLVFGEN_TIMER);
sys/dev/ixl/i40e_nvm.c
1331
gtime = rd32(hw, I40E_GLVFGEN_TIMER);
sys/dev/ixl/i40e_nvm.c
187
srctl = rd32(hw, I40E_GLNVM_SRCTL);
sys/dev/ixl/i40e_nvm.c
234
sr_reg = rd32(hw, I40E_GLNVM_SRDATA);
sys/dev/ixl/i40e_nvm.c
58
gens = rd32(hw, I40E_GLNVM_GENS);
sys/dev/ixl/i40e_nvm.c
65
fla = rd32(hw, I40E_GLNVM_FLA);
sys/dev/ixl/if_ixl.c
1436
reg = rd32(hw, I40E_PFINT_ICR0_ENA);
sys/dev/ixl/ixl_pf_i2c.c
114
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
165
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
174
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
179
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
202
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
211
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
219
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
252
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
302
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
357
i2cctl_r = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
412
*i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
429
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
466
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
533
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
553
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
599
i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_i2c.c
627
reg = rd32(hw, I40E_GLGEN_I2CCMD(hw->func_caps.mdio_port_num));
sys/dev/ixl/ixl_pf_i2c.c
652
reg = rd32(hw, I40E_GLGEN_I2CCMD(hw->func_caps.mdio_port_num));
sys/dev/ixl/ixl_pf_i2c.c
683
reg = rd32(hw, I40E_GLGEN_I2CCMD(portnum));
sys/dev/ixl/ixl_pf_i2c.c
77
u32 i2cctl = rd32(hw, IXL_I2C_REG(hw));
sys/dev/ixl/ixl_pf_iflib.c
145
reg = rd32(hw, I40E_PFINT_ICR0);
sys/dev/ixl/ixl_pf_iflib.c
150
mask = rd32(hw, I40E_PFINT_ICR0_ENA);
sys/dev/ixl/ixl_pf_iflib.c
167
rstat_reg = rd32(hw, I40E_GLGEN_RSTAT);
sys/dev/ixl/ixl_pf_iflib.c
210
reg = rd32(hw, I40E_PFHMC_ERRORINFO);
sys/dev/ixl/ixl_pf_iflib.c
214
reg = rd32(hw, I40E_PFHMC_ERRORDATA);
sys/dev/ixl/ixl_pf_iflib.c
778
val = rd32(tx_que->vsi->hw, tx_que->txr.tail);
sys/dev/ixl/ixl_pf_iflib.c
800
val = rd32(rx_que->vsi->hw, rx_que->rxr.tail);
sys/dev/ixl/ixl_pf_iflib.c
91
icr0 = rd32(hw, I40E_PFINT_ICR0);
sys/dev/ixl/ixl_pf_iov.c
1535
icr0 = rd32(hw, I40E_PFINT_ICR0_ENA);
sys/dev/ixl/ixl_pf_iov.c
1549
vflrstat = rd32(hw, I40E_GLGEN_VFLRSTAT(vflrstat_index));
sys/dev/ixl/ixl_pf_iov.c
363
ciad = rd32(hw, I40E_PF_PCI_CIAD);
sys/dev/ixl/ixl_pf_iov.c
382
vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num));
sys/dev/ixl/ixl_pf_iov.c
410
vfrstat = rd32(hw, I40E_VPGEN_VFRSTAT(vf->vf_num));
sys/dev/ixl/ixl_pf_iov.c
420
vfrtrig = rd32(hw, I40E_VPGEN_VFRTRIG(vf->vf_num));
sys/dev/ixl/ixl_pf_main.c
1684
reg = rd32(hw, I40E_QTX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1690
reg = rd32(hw, I40E_QTX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1718
reg = rd32(hw, I40E_QRX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1724
reg = rd32(hw, I40E_QRX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1771
reg = rd32(hw, I40E_QTX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1776
reg = rd32(hw, I40E_QTX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1807
reg = rd32(hw, I40E_QRX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1812
reg = rd32(hw, I40E_QRX_ENA(pf_qidx));
sys/dev/ixl/ixl_pf_main.c
1854
reg = rd32(hw, I40E_GL_MDET_TX);
sys/dev/ixl/ixl_pf_main.c
1871
reg = rd32(hw, I40E_PF_MDET_TX);
sys/dev/ixl/ixl_pf_main.c
1881
reg = rd32(hw, I40E_VP_MDET_TX(i));
sys/dev/ixl/ixl_pf_main.c
1930
reg = rd32(hw, I40E_GL_MDET_RX);
sys/dev/ixl/ixl_pf_main.c
1945
reg = rd32(hw, I40E_PF_MDET_RX);
sys/dev/ixl/ixl_pf_main.c
1955
reg = rd32(hw, I40E_VP_MDET_RX(i));
sys/dev/ixl/ixl_pf_main.c
2008
reg = rd32(hw, I40E_PFINT_ICR0_ENA);
sys/dev/ixl/ixl_pf_main.c
244
fwsts = rd32(hw, I40E_GL_FWSTS) & I40E_GL_FWSTS_FWS1B_MASK;
sys/dev/ixl/ixl_pf_main.c
2454
new_data = rd32(hw, reg);
sys/dev/ixl/ixl_pf_main.c
3276
reg = rd32(hw, I40E_GLGEN_MDIO_I2C_SEL(i));
sys/dev/ixl/ixl_pf_main.c
3646
rd32(hw, I40E_PRTMAC_PCS_LINK_CTRL),
sys/dev/ixl/ixl_pf_main.c
3647
rd32(hw, I40E_PRTMAC_PCS_LINK_STATUS1(0)),
sys/dev/ixl/ixl_pf_main.c
3648
rd32(hw, I40E_PRTMAC_PCS_LINK_STATUS2),
sys/dev/ixl/ixl_pf_main.c
3649
rd32(hw, I40E_PRTMAC_PCS_XGMII_FIFO_STATUS),
sys/dev/ixl/ixl_pf_main.c
3650
rd32(hw, I40E_PRTMAC_PCS_AN_LP_STATUS),
sys/dev/ixl/ixl_pf_main.c
3651
rd32(hw, I40E_PRTMAC_PCS_KR_STATUS),
sys/dev/ixl/ixl_pf_main.c
3652
rd32(hw, I40E_PRTMAC_PCS_FEC_KR_STATUS1),
sys/dev/ixl/ixl_pf_main.c
3653
rd32(hw, I40E_PRTMAC_PCS_FEC_KR_STATUS2)
sys/dev/ixl/ixl_pf_main.c
4173
reg = rd32(hw, I40E_PFQF_HLUT(i));
sys/dev/ixl/ixl_pf_main.c
4919
rd32(hw, I40E_PFINT_LNKLSTN(rx_que->msix - 1)),
sys/dev/ixl/ixl_pf_main.c
4920
rd32(hw, I40E_QINT_RQCTL(rx_que->msix - 1)));
sys/dev/ixl/ixl_pf_main.c
4926
rd32(hw, I40E_QINT_TQCTL(tx_que->msix - 1)));
sys/dev/ixl/ixl_pf_main.c
4961
rd32(hw, I40E_PFINT_DYN_CTLN(rx_que->msix - 1)));
sys/dev/ixl/ixl_pf_main.c
787
rd32(hw, I40E_PFINT_ICR0); /* read to clear */