sys/dev/qlxge/qls_hw.c

1015

ret = qls_sem_lock(ha, Q81_CTL_SEM_MASK_ICB, Q81_CTL_SEM_SET_ICB);

sys/dev/qlxge/qls_hw.c

1094

ret = qls_sem_lock(ha, Q81_CTL_SEM_MASK_ICB, Q81_CTL_SEM_SET_ICB);

sys/dev/qlxge/qls_hw.c

1164

ret = qls_sem_lock(ha, Q81_CTL_SEM_MASK_ICB, Q81_CTL_SEM_SET_ICB);

sys/dev/qlxge/qls_hw.c

1838

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_FLASH, Q81_CTL_SEM_SET_FLASH)) {

sys/dev/qlxge/qls_hw.c

2149

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_PROC_ADDR_NIC_RCV,

sys/dev/qlxge/qls_hw.c

243

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_MAC_SERDES,

sys/dev/qlxge/qls_hw.c

309

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_MAC_SERDES,

sys/dev/qlxge/qls_hw.c

395

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_RIDX_DATAREG,

sys/dev/qlxge/qls_hw.c

413

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_RIDX_DATAREG,

sys/dev/qlxge/qls_hw.c

480

if (qls_sem_lock(ha, Q81_CTL_SEM_MASK_RIDX_DATAREG,

sys/dev/qlxge/qls_hw.c

61

static int qls_sem_lock(qla_host_t *ha, uint32_t mask, uint32_t value);